mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Kwanghoon Son <k.son@samsung.com>
To: Sunyeal Hong <sunyeal.hong@samsung.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>
Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 4/4] clk: samsung: add top clock support for ExynosAuto v920 SoC
Date: Mon, 12 Aug 2024 13:39:47 +0900	[thread overview]
Message-ID: <58dfae564a4a624e464c7803a309f1f07b5ae83d.camel@samsung.com> (raw)
In-Reply-To: <20240730071221.2590284-5-sunyeal.hong@samsung.com>

On Tue, 2024-07-30 at 16:12 +0900, Sunyeal Hong wrote:
> This adds support for CMU_TOP which generates clocks for all the
> function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
> CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
> and they will generate bus clocks.
> 
> Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
> ---
>  drivers/clk/samsung/Makefile             |    1 +
>  drivers/clk/samsung/clk-exynosautov920.c | 1173 ++++++++++++++++++++++
>  2 files changed, 1174 insertions(+)
>  create mode 100644 drivers/clk/samsung/clk-exynosautov920.c
> 

[snip]

> +static const struct samsung_cmu_info peric0_cmu_info __initconst = {
> +	.mux_clks		= peric0_mux_clks,
> +	.nr_mux_clks		= ARRAY_SIZE(peric0_mux_clks),
> +	.div_clks		= peric0_div_clks,
> +	.nr_div_clks		= ARRAY_SIZE(peric0_div_clks),
> +	.nr_clk_ids		= CLKS_NR_PERIC0,
> +	.clk_regs		= peric0_clk_regs,
> +	.nr_clk_regs		= ARRAY_SIZE(peric0_clk_regs),
> +	.clk_name		= "dout_clkcmu_peric0_noc",

Maybe silly question, (I'm really new to this cmu).
Isn't it should be "noc"?

I thought this name is from dt binding.
(drivers/clk/samsung/clk-exynos-arm64.c)


		parent_clk = clk_get(dev, cmu->clk_name);
		data = dev_get_drvdata(dev);

That's why GS101, and my recent v9 patch name like "bus".

Best regards,
kwang.

> +};
> +
> +static int __init exynosautov920_cmu_probe(struct platform_device *pdev)
> +{
> +	const struct samsung_cmu_info *info;
> +	struct device *dev = &pdev->dev;
> +
> +	info = of_device_get_match_data(dev);
> +	exynos_arm64_register_cmu(dev, dev->of_node, info);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id exynosautov920_cmu_of_match[] = {
> +	{
> +		.compatible = "samsung,exynosautov920-cmu-peric0",
> +		.data = &peric0_cmu_info,
> +	},
> +};
> +
> +static struct platform_driver exynosautov920_cmu_driver __refdata = {
> +	.driver = {
> +		.name = "exynosautov920-cmu",
> +		.of_match_table = exynosautov920_cmu_of_match,
> +		.suppress_bind_attrs = true,
> +	},
> +	.probe = exynosautov920_cmu_probe,
> +};
> +
> +static int __init exynosautov920_cmu_init(void)
> +{
> +	return platform_driver_register(&exynosautov920_cmu_driver);
> +}
> +core_initcall(exynosautov920_cmu_init);


      reply	other threads:[~2024-08-12  4:39 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20240730071227epcas2p3db10248818bb509aa069205bb9bb851b@epcas2p3.samsung.com>
2024-07-30  7:12 ` [PATCH v5 0/4] initial clock support for exynosauto " Sunyeal Hong
     [not found]   ` <CGME20240730071227epcas2p278017961013950cd75c4266eda45c236@epcas2p2.samsung.com>
2024-07-30  7:12     ` [PATCH v5 1/4] dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings Sunyeal Hong
2024-07-31  9:27       ` Krzysztof Kozlowski
2024-08-11 16:54         ` Alim Akhtar
2024-08-12  6:31           ` Krzysztof Kozlowski
     [not found]   ` <CGME20240730071227epcas2p1d1c0d9d1f40b045002ce0509f5168648@epcas2p1.samsung.com>
2024-07-30  7:12     ` [PATCH v5 2/4] arm64: dts: exynos: add initial CMU clock nodes in ExynosAuto v920 Sunyeal Hong
     [not found]   ` <CGME20240730071227epcas2p356635cf71f4d652be2bfa733c8b5848e@epcas2p3.samsung.com>
2024-07-30  7:12     ` [PATCH v5 3/4] clk: samsung: clk-pll: Add support for pll_531x Sunyeal Hong
     [not found]   ` <CGME20240730071228epcas2p1923fbb513190816d7bd9afaf0a4f5066@epcas2p1.samsung.com>
2024-07-30  7:12     ` [PATCH v5 4/4] clk: samsung: add top clock support for ExynosAuto v920 SoC Sunyeal Hong
2024-08-12  4:39       ` Kwanghoon Son [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=58dfae564a4a624e464c7803a309f1f07b5ae83d.camel@samsung.com \
    --to=k.son@samsung.com \
    --cc=alim.akhtar@samsung.com \
    --cc=conor+dt@kernel.org \
    --cc=cw00.choi@samsung.com \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-samsung-soc@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=robh@kernel.org \
    --cc=s.nawrocki@samsung.com \
    --cc=sboyd@kernel.org \
    --cc=sunyeal.hong@samsung.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®