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h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Y9Rgcd4Od3FdqAlA8IISallEi2NL4/4QJv8djaC/sCPbHvXMgOtUFf7jcp7FC1elS WKejtp/MZdRLZ5Nul8Rmii1fZ5i6EaoxnAk1MA/nr9fbfqKawS8a22HmXhqf6KqlUI lVENAHpsZQCizlTVXLIUCjx/TIrMdWTSX97uegrWubYLog3oCd1B4UX7Sx0k4Gte3t 6BgUL0WrwR4JHQPW3ETV+dRAJP35DkpMaoxTORtr8LWPqYw5h+oEO24wtDR6Xvct3t 2zRREElxESbM4tjis4191mCsonim4ypl09p+9wT2/YrEOazLDNZGCbPiPAt/RhXkbj E2gj57fob44lA== Message-ID: <590a828f-8008-45d8-ae10-c9099108da0b@zytor.com> Date: Mon, 24 Jun 2024 10:42:27 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/4] x86/cpufeatures: Use AWK to generate {REQUIRED|DISABLED}_MASK_BIT_SET To: Andrew Cooper , Brian Gerst Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, will@kernel.org, peterz@infradead.org, akpm@linux-foundation.org, acme@kernel.org, namhyung@kernel.org References: <20240622171435.3725548-1-xin@zytor.com> <20240622171435.3725548-5-xin@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 6/24/2024 3:24 AM, Andrew Cooper wrote: > On 24/06/2024 8:29 am, Xin Li wrote: >> On 6/23/2024 1:28 PM, Brian Gerst wrote: >>> On Sat, Jun 22, 2024 at 1:14 PM Xin Li (Intel) wrote: >>>> -               printf "#define %s_MASK_CHECK >>>> BUILD_BUG_ON_ZERO(NCAPINTS != %d)\n\n", s, ncapints; >>>> +               printf "\n#define %s_FEATURE(x)\t\t\t\t\\\n", s; >>>> +               printf "\t((\t\t\t\t\t"; >>>> +               for (i = 0; i < ncapints; i++) { >>>> +                       if (masks[i]) >>>> +                               printf "\t\\\n\t\t((x) >> 5) == %2d >>>> ? %s_MASK%d :", i, s, i; >>>> +               } >>>> +               printf " 0\t\\\n"; >>>> +               printf "\t) & (1 << ((x) & 31)))\n"; >>> >>> The original macro had 1UL here.  I don't know if it is strictly >>> necessary in this case since we're using 32-bit masks, but it would >>> probably be safer. >> >> I did notice it, but don't think UL is needed. > > You do need 1U, or you'll trip UBSAN every time you test feature 31 in a > word. This is so obvious, how come I totally missed it! > I'll note that the hypervisor bit is one such example. What's more, generally bit 31 is nothing special, I find: #define X86_FEATURE_PBE ( 0*32+31) /* Pending Break Enable */ #define X86_FEATURE_3DNOW ( 1*32+31) /* 3DNow */ #define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */ ... Definitely I must append "U". Thanks! Xin