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[213.98.130.118]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4872714ef38sm54949225e9.21.2026.03.29.04.53.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Mar 2026 04:53:48 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Michal Piekos Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Michal Piekos Subject: Re: [PATCH] arm64: dts: allwinner: enable h616 timer support Date: Sun, 29 Mar 2026 13:53:45 +0200 Message-ID: <5977334.DvuYhMxLoT@jernej-laptop> In-Reply-To: <20260329-h616-timer-v1-1-5966d0420a66@mmpsystems.pl> References: <20260329-h616-timer-v1-1-5966d0420a66@mmpsystems.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne nedelja, 29. marec 2026 ob 13:43:04 Srednjeevropski poletni =C4=8Das je= Michal Piekos napisal(a): > Add support for timer by reusing existing sun4i timer driver. >=20 > H616 timer is compatible with earlier sunxi timer variants and provides > both clocksource and clockevent functionality. It runs from 24 MHz > oscillator. It can serve as broadcast clockevent for wake up from idle > states. >=20 > Tested on Orange Pi Zero 3: > - timer is registered as clocksource: > - switching clocksource at runtime works > - timer operates as a broadcast clockevent device > - no regression observed compared to arch_sys_counter >=20 > Signed-off-by: Michal Piekos > --- > Test results: >=20 > Clocksource switching: > cat /sys/devices/system/clocksource/clocksource0/available_clocksource > arch_sys_counter timer > echo timer > /sys/devices/system/clocksource/clocksource0/current_clock= source > [ 5031.105997] clocksource: Switched to clocksource timer >=20 > Clockevent configuration: > cat /proc/timer_list > ... > Tick Device: mode: 1 > Broadcast device > Clock Event Device: sun4i_tick > max_delta_ns: 178956969070 > min_delta_ns: 1000 > mult: 51539608 > shift: 31 > mode: 1 > next_event: 9223372036854775807 nsecs > set_next_event: sun4i_clkevt_next_event > shutdown: sun4i_clkevt_shutdown > periodic: sun4i_clkevt_set_periodic > oneshot: sun4i_clkevt_set_oneshot > resume: sun4i_clkevt_shutdown > event_handler: tick_handle_oneshot_broadcast > ... >=20 > Cyclictest measurements: > Dominated by system scheduler latency and do not reflect clocksource > precision. > --- > arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) >=20 > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/= boot/dts/allwinner/sun50i-h616.dtsi > index 8d1110c14bad..bf054869e78b 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > @@ -228,6 +228,15 @@ cpu_speed_grade: cpu-speed-grade@0 { > }; > }; > =20 > + timer0: timer@3009000 { > + compatible =3D "allwinner,sun50i-h616-timer", > + "allwinner,sun8i-a23-timer"; You have to add above combo to DT bindings. Best regards, Jernej > + reg =3D <0x03009000 0xa0>; > + interrupts =3D , > + ; > + clocks =3D <&osc24M>; > + }; > + > watchdog: watchdog@30090a0 { > compatible =3D "allwinner,sun50i-h616-wdt", > "allwinner,sun6i-a31-wdt"; >=20 > --- > base-commit: be762d8b6dd7efacb61937d20f8475db8f207655 > change-id: 20260328-h616-timer-046e6ac3549e >=20 > Best regards, >=20