Re: [PATCH v2] arm64: dts: qcom: ipq5424: Describe the 4-wire UART SE

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 6/26/25 7:16 AM, Kathiravan Thirumoorthy wrote:
> 
> On 6/25/2025 5:44 PM, Konrad Dybcio wrote:
>> On 6/25/25 7:55 AM, Kathiravan Thirumoorthy wrote:
>>> On 6/24/2025 8:08 PM, Konrad Dybcio wrote:
>>>> On 6/24/25 11:00 AM, Kathiravan Thirumoorthy wrote:
>>>>> QUPv3 in IPQ5424 consists of six Serial Engines (SEs). Describe the
>>>>> first SE, which supports a 4-wire UART configuration suitable for
>>>>> applications such as HS-UART.
>>>>>
>>>>> Note that the required initialization for this SE is not handled by the
>>>>> bootloader. Therefore, add the SE node in the device tree but keep it
>>>>> disabled. Enable it once Linux gains support for configuring the SE,
>>>>> allowing to use in relevant RDPs.
>>>> Do you mean fw loading support?
>>> SE0 is minicore, so we don't need to load the FW. But apart from FW , protocol specific configurations to be done in the SE's Image Configuration registers, which is taken care in the patch[1]
>>>
>>> [1] [PATCH v5 0/5] Add support to load QUP SE firmware from <https://lore.kernel.org/linux-arm-msm/20250624095102.1587580-1-viken.dadhaniya@oss.qualcomm.com/T/#m37a6b739c66040cde5b6b0121a03da7ea6715842>
>> I've heard the 'minicore' or similar name before.. how does it differ
>> from a "normal" SE? (+Mukesh & Viken)
> 
> There are 2 types of SE. One is Minicore and another one is FW based.
> 
> Minicore SE supports only I2C / SPI / UART protocols and it is fixed in RTL. Depends on the protocol needed, we need to configure the "Image Configuration registers".
> 
> FW based SE supports wide variety of protocols like I3C, CAN and so on. This can be achieved by the loading the protocol specific FW image and configuring the "Image Configuration registers".

Got it, thank you

Konrad