From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76FD6224EA for ; Wed, 29 Jan 2025 15:53:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738166023; cv=none; b=PrNkCBLz96qBvxuds+CItqmj89DdpK96QUfsi9OdtMXlq7a4aUrkmMugPUXMPaDw+S/B5FEj96ZTdBwRAuHXDrGvzI6S4tV8nfoShkEbQiufp5YZHKDdq6vGL6QeV/3xL3XMSPFtYDXwBJu/7o7stR87S173iNW4I/Rl9ZSzpQ8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738166023; c=relaxed/simple; bh=gTbnYyj3y+YdF7srrpnX/v/I2KyYUhfpPJEytKtP5SU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=DGWL1x4ACBN5HiJqm4sJsgYedkEBqPJmQRfM86j4U0eMZ/fgGLfBC2el2SrNHQ8eCveJNyq8oztU+mMIo9A27wiYruY8dLZ02V+P2T2YgdeoDQ02QKTEosHp6C/d2xKvRMDcgEETJ2RGefak3kD/anyBKqOLznpfOIuheF4rcqc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=siP0MbSZ; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="siP0MbSZ" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID:Sender:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=N5mhjj4C724jR9Tjgt0jzsPyLjPer8dLoUH3kOj7Cp8=; b=siP0MbSZBgYja2oTQjeubN1ptb S8sEI5aBpvF1SaCPI80tzHsdNbLHXgARTCZi+WzaVQTuuAl8hoheebcaDf1lS3Ja+GVNCZw5s7Prg vBjcXtZ34kFfiYwymlmmX4uzxT9++I9mf6j+yFOwX5IumKikntzjW6TC9pVn6dI/uj9HcBCLDdDLk PBUkqaXpSn9jGwkyVrELQN6UNmVxYbeVPHY+VXWP9Dftc3QhA6q0uF8UjsgPbEepzFa1/2GCGQ41o 2un6w2UNyS++/9QmUDP3SHWyOM57lWDFRzqkjUVYvFtWFg7zviVHiDTz3sIWPvHAmtJTTM0eeXwPh NNzMyGpA==; Received: from 189-68-33-219.dsl.telesp.net.br ([189.68.33.219] helo=[192.168.15.100]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_128_GCM:128) (Exim) id 1tdANG-000e2Q-FO; Wed, 29 Jan 2025 16:53:12 +0100 Message-ID: <59b06cd5-979d-47a7-b955-c565b23ae21b@igalia.com> Date: Wed, 29 Jan 2025 12:53:05 -0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 2/2] drm/amdgpu: Enable async flip on overlay planes To: Xaver Hugl Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , Xinhui Pan , dmitry.baryshkov@linaro.org, Simon Ser , joshua@froggi.es, Daniel Stone , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org References: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> <20250127-tonyk-async_flip-v12-2-0f7f8a8610d3@igalia.com> Content-Language: en-US From: =?UTF-8?Q?Andr=C3=A9_Almeida?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Em 29/01/2025 11:36, Xaver Hugl escreveu: > Am Mo., 27. Jan. 2025 um 21:00 Uhr schrieb André Almeida > : >> >> amdgpu can handle async flips on overlay planes, so allow it for atomic >> async checks. >> >> Signed-off-by: André Almeida >> --- >> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 10 ++++++---- >> 1 file changed, 6 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >> index 774cc3f4f3fd9a964fe48c66eb596d2f6dfee602..6bfed3d1530e6610eea025b477f409ee505870da 100644 >> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >> @@ -1258,21 +1258,23 @@ static int amdgpu_dm_plane_atomic_check(struct drm_plane *plane, >> } >> >> static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane, >> - struct drm_atomic_state *state) >> + struct drm_atomic_state *state, bool flip) >> { >> struct drm_crtc_state *new_crtc_state; >> struct drm_plane_state *new_plane_state; >> struct dm_crtc_state *dm_new_crtc_state; >> >> - /* Only support async updates on cursor planes. */ >> - if (plane->type != DRM_PLANE_TYPE_CURSOR) >> + if (flip) { >> + if (plane->type != DRM_PLANE_TYPE_OVERLAY) >> + return -EINVAL; >> + } else if (plane->type != DRM_PLANE_TYPE_CURSOR) >> return -EINVAL; > > This changes the logic for cursor updates, flipping on the cursor > plane allowed async updates before. Is that intentional? > It's not the intention of this patch to disable async updates on cursor planes... but I don't think it's happening here? Async plane updates and async page flips are different things. Any function that used to call amdgpu_dm_plane_atomic_async_check() for an async update on a cursor plane will continue to being able to do that. For callers of _atomic_async_check() from a page flip path (like drm_atomic_set_property()), those couldn't flip a cursor plane, and will continue to be like that for now. At least this is my analysis, please let me know if I got something wrong.