From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61505C71153 for ; Mon, 4 Sep 2023 08:26:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240088AbjIDI06 (ORCPT ); Mon, 4 Sep 2023 04:26:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231621AbjIDI04 (ORCPT ); Mon, 4 Sep 2023 04:26:56 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3ADB8D8; Mon, 4 Sep 2023 01:26:53 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 00D9711FB; Mon, 4 Sep 2023 01:27:31 -0700 (PDT) Received: from [10.57.91.85] (unknown [10.57.91.85]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0A0633F8A4; Mon, 4 Sep 2023 01:26:50 -0700 (PDT) Message-ID: <59bf237d-1645-8c44-94f2-72a0cf229595@arm.com> Date: Mon, 4 Sep 2023 09:26:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 Subject: Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property To: Linu Cherian , mike.leach@linaro.org, james.clark@arm.com, leo.yan@linaro.org Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org, sgoutham@marvell.com, gcherian@marvell.com References: <20230904050548.28047-1-lcherian@marvell.com> <20230904050548.28047-2-lcherian@marvell.com> From: Suzuki K Poulose In-Reply-To: <20230904050548.28047-2-lcherian@marvell.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/09/2023 06:05, Linu Cherian wrote: > memory-region 0: Reserved trace buffer memory > > TMC ETR: When available, use this reserved memory region for > trace data capture. Same region is used for trace data > retention after a panic or watchdog reset. > > TMC ETF: When available, use this reserved memory region for > trace data retention synced from internal SRAM after a panic or > watchdog reset. > > memory-region 1: Reserved meta data memory > > TMC ETR, ETF: When available, use this memory for register > snapshot retention synced from hardware registers after a panic > or watchdog reset. Instead of having to use a number to map the memory regions, could we use memory-region-names property to describe the index ? That way it is much easier to read and is less error prone. Names could be something like: tmc-reserved-trace tmc-reserved-metadata Suzuki > > Signed-off-by: Linu Cherian > --- > .../devicetree/bindings/arm/arm,coresight-tmc.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml > index cb8dceaca70e..dce54978554a 100644 > --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml > @@ -101,6 +101,17 @@ properties: > and ETF configurations. > $ref: /schemas/graph.yaml#/properties/port > > + memory-region: > + items: > + - description: Reserved trace buffer memory for ETR and ETF sinks. > + For ETR, this reserved memory region is used for trace data capture. > + Same region is used for trace data retention as well after a panic > + or watchdog reset. > + For ETF, this reserved memory region is used for retention of trace > + data synced from internal SRAM after a panic or watchdog reset. > + > + - description: Reserved meta data memory. Used for ETR and ETF sinks. > + > required: > - compatible > - reg > @@ -115,6 +126,8 @@ examples: > etr@20070000 { > compatible = "arm,coresight-tmc", "arm,primecell"; > reg = <0x20070000 0x1000>; > + memory-region = <&etr_trace_mem_reserved>, > + <&etr_mdata_mem_reserved>; > > clocks = <&oscclk6a>; > clock-names = "apb_pclk";