From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BB43C77B7F for ; Tue, 16 May 2023 14:31:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233992AbjEPObs (ORCPT ); Tue, 16 May 2023 10:31:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233513AbjEPObi (ORCPT ); Tue, 16 May 2023 10:31:38 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF5505FC5; Tue, 16 May 2023 07:31:24 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34GBJq7T012005; Tue, 16 May 2023 16:31:11 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=6nNiCRdvvjRnaHdbPAL4fDI0MyKgQh3CQiE0id+v8TU=; b=kuGrszbY9SFO9KkdWJJuYUqoimbZ+EVuXcXUkPVhHPjEo+A+B5oIdgIzgOQV0QmSDUnb A9mWd6RqKhlAZQNx2jQlVZMdkRH++NmHO+b5cjIxPEYtJ8aldsnN6p0QbIRlJbDjVaK0 WOfsukN4fA+lOvS5cPbC9PzNy11lAtfIYJqZIYf72nkreA0xH+IfFw0NKASSwXlVv1X2 2aTm1wwzJrM6s4g8+rQp8ooTr1XVPms4RtG03lo+JLpRNSRV92EqiU00c/ZrOp20DIi9 CxsqutuF6wzVyYD3NLENuzjQ31K48xQJYlkF68Mja4eEwnXcOhCtEwzdXSEmzRF/ca90 TA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qkgqx1rs4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 16 May 2023 16:31:11 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D1C0B10002A; Tue, 16 May 2023 16:31:10 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id BCC0022F7C3; Tue, 16 May 2023 16:31:10 +0200 (CEST) Received: from [10.252.0.230] (10.252.0.230) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 16 May 2023 16:31:10 +0200 Message-ID: <59e7e5e8-a298-81b2-e72d-ee657cf7aa1a@foss.st.com> Date: Tue, 16 May 2023 16:31:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH] ARM: dts: stm32: use RCC macro for CRC node on stm32f746 Content-Language: en-US To: Dario Binacchi , CC: Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , , , References: <20230516085219.3797677-1-dario.binacchi@amarulasolutions.com> From: Alexandre TORGUE In-Reply-To: <20230516085219.3797677-1-dario.binacchi@amarulasolutions.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.252.0.230] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-16_07,2023-05-16_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org hi Dario On 5/16/23 10:52, Dario Binacchi wrote: > The patch replaces the number 12 with the appropriate numerical constant > already defined in the file stm32f7-rcc.h. > > Signed-off-by: Dario Binacchi > --- > > arch/arm/boot/dts/stm32f746.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi > index dc868e6da40e..e3564b74a779 100644 > --- a/arch/arm/boot/dts/stm32f746.dtsi > +++ b/arch/arm/boot/dts/stm32f746.dtsi > @@ -515,7 +515,7 @@ pwrcfg: power-config@40007000 { > crc: crc@40023000 { > compatible = "st,stm32f7-crc"; > reg = <0x40023000 0x400>; > - clocks = <&rcc 0 12>; > + clocks = <&rcc 0 STM32F7_AHB1_CLOCK(CRC)>; > status = "disabled"; > }; > Applied on stm32-next. Thanks. Alex