Re: [PATCH v2 2/3] ARM: dts: socfpga: fpga bridges bindings docs

[Pantelis Antoniou <pantelis.antoniou@konsulko.com>]

Hi Stefan, Allan,

Sorry, haven’t had a chance to review all this yet; will do so in the weekend.
Just wanted to pop in and comment on a few things.

> On Oct 24, 2014, at 10:00 AM, Steffen Trumtrar <s.trumtrar@pengutronix.de> wrote:
> 
> Hi!
> 
> On Thu, Oct 23, 2014 at 06:51:06PM -0500, atull@opensource.altera.com wrote:
>> From: Alan Tull <atull@opensource.altera.com>
> 
> (...)
> 
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
>> new file mode 100644
>> index 0000000..bc24a2e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
>> @@ -0,0 +1,53 @@
>> +Altera FPGA/HPS Bridge Driver
>> +
>> +This driver manages a bridge between a FPGA and a host processor system (HPS).
>> +User space can enable or disable the bridge by writing a "1" or a "0",
>> +respectively, to its enable file under bridge's entry in
>> +/sys/class/fpga-bridge.  Typically, one disables the bridges before
>> +reprogramming the FPGA.  Once the FPGA is reprogrammed, the bridges are
>> +reenabled.
>> +
> 
> NAK.
> 
> This is all linux specific and doesn't belong here.
> 

We know. The DT spec hasn’t been updated for a while, and this is going to be
part of what we want to do with the restarting of the ePAPR spec process.

So absolutes like “DT is a hardware description only" might be too strong statements, that
do not work in practice anymore.

There’s no such thing as pure hardware devices lately - there is always a configuration
component; some of it OS specific, some of it not.

We have to be engaged in the process and figure out how to update the spec for what is
now the state of the art in the industry.

Regards

— Pantelis