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Mon, 23 Feb 2026 12:28:20 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , Subject: [PATCH v3 02/10] iommu/arm-smmu-v3: Pass in arm_smmu_make_cd_fn to arm_smmu_set_pasid() Date: Mon, 23 Feb 2026 12:27:38 -0800 Message-ID: <5a46ec5a87d7f43bae47468073b64dae603f36eb.1771877893.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E66:EE_|PH7PR12MB5951:EE_ X-MS-Office365-Filtering-Correlation-Id: 7bb15435-c18d-4bb8-5b6f-08de731a2172 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|7416014|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?+lYIMMiacBTXTGP8VPuj4GV9Aczo+y5tRelr/X6F0BvafDBExgqSpJpuiWGV?= =?us-ascii?Q?lhhzW9UDXSrunsjV5MsDD1FcXo/YC40JLBRgjxDmSBGu7dYqB5CN0NhseP9K?= =?us-ascii?Q?bYt6oVRBEahFXR48unohlF1Z4lkbhBtqgD+FVaINQ9IHSSAjwWD+AeWhDvTw?= =?us-ascii?Q?DdpEr59hrcmoPres1K72rDh8g2mJIg6uLD45VtUsoXdhZjVg5cI1/xGQnCKB?= =?us-ascii?Q?77FDQoFg/jBfExVKyAJBkN305MEkyeAuabYsFS9DRPjMgfRcEZ1GVve3msN8?= =?us-ascii?Q?ElMg8hK9grSjo34QKsrj6MnOWqmyVIx4/qm0GaBICeBsSJozdk/i3sfq7OTY?= =?us-ascii?Q?ZQVx9GfTje59EWnnbmJzmFRQ/kpMLs/UtOB4gjtV0bJV+zAzpnEOFusTwegF?= =?us-ascii?Q?9HTegcXIEI2IYa8p9kPeYNxbxweae1aIXYbMwAQzD0lkCaCsAyHstd5CeuGA?= =?us-ascii?Q?YS4d+qL6hcqAMCrcRKzyo2boOtU4olysVYU35ZgxODxf/fRz0caPqK1pWSSH?= =?us-ascii?Q?1G04PihzuXHNZkHOSvCMGTd/UDjCqzXTMGZ1IDDhlZq9slFPKXDvWVfdoobm?= =?us-ascii?Q?hXU9aBNhiDyYE5W5GhRPdKhQ62DVBHGVi60RBZecAN7yKjAcKptOqztT1cPI?= =?us-ascii?Q?5j5PdnLUFXsbVBjNatCu+P5RtkYcUMnrxEtDhUg4epQE0zV1KrNd4sqTMbc7?= =?us-ascii?Q?84HqTQ2dthSppVtvkm0pKLpmnTLUT/NwwO5pgiLzYslHttWgl4RYwSAzYrzC?= =?us-ascii?Q?u6ziURkpNMrjjcGxxu2dSEjH96Tdc2YIM6x1qk0fxsxeB2j/4tLA8zeVHLcc?= =?us-ascii?Q?vWvj2Cu3wo2ENPIm29mNDUWl7hf2bhKRIB7xbdFYRRdbHTDGQk96Kavxz4h1?= =?us-ascii?Q?zB76RdBl01PUTVDg9dKR81NBFxpqxOBYbIp0XXoZz+izt8ZK0Zy3vype6GUy?= =?us-ascii?Q?LCHIsfSXJFtgSsV3Nkx16Klyc7/xZ59UN1Oy6ocAA1ZVukGlkU/zmG2PruzK?= =?us-ascii?Q?1AR5hfCOnCi0D8NXl7YSiDvdBV5CMrt/1pBiRTqGMqDE33G2vUD+t/+U42Tr?= =?us-ascii?Q?fIzPqEgqU76hL6kYJAu1SHBxaIESqFfxcIgM9v1eAi2Dh0+WY4/mR5tuBqoM?= =?us-ascii?Q?qcJ+xpQale1yk7QzpLwOhU2R0AJTA+OrPMzkF75LHehlhPKQ5sDJA9BNcxpP?= =?us-ascii?Q?1oSUtZOWocq86P/TCDH2CK0i7dJaJWZLqraL0Dr2aO3wOneSIDq4c3D6t6z3?= =?us-ascii?Q?a3uSbbCMXEE5Z9Vt+sFRS8SeaHsJqvfGqn4lKYv/4hVff/m0xqQj+z7SGKsd?= =?us-ascii?Q?TgHpsChTKUyMbCMwHtYEUvxwNsircIt4oVP1wOilAXmZf9mrKOcBVx5SPFgg?= =?us-ascii?Q?+S3//JUkODF+5WPzW7CIYs/vVdGIDwZZB2Wul+OAs/W7lueV0t9IqDaAQDk4?= =?us-ascii?Q?sgCXNRsOVd9hk+HCyy0kwaJheLAl/l7UlufXK/W5rETUigw9h8qfpwy5HFu0?= =?us-ascii?Q?IP27BBd4rcj6q9ouQSfo7WczGa2VuGjf0gh3xCr7eFzTQm0f50/fBee8OmxG?= =?us-ascii?Q?rdGMSeL9U/F9K3a4sxJALe07sMAezk/JGSi5Lz12akRiIdWk0+YCw98kKsJv?= =?us-ascii?Q?AmNpY6S185bliJySTT2wLA7fet64UIr/XD2amRUOot7ni0ne3BIppCozviYu?= =?us-ascii?Q?MvtsAw=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(7416014)(376014)(1800799024);DIR:OUT;SFP:1101; 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The reason for such a flow is for the timing of arm_smmu_asid_lock, since it was too early to take the mutex outside the function. Tidy it up by passing in a function pointer for CD making,, which supports both existing functions: arm_smmu_make_s1_cd() and arm_smmu_make_sva_cd(). Then arm_smmu_set_pasid() can make a CD inside the lock where ASID is safe to access. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 ++++++- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 4 ++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 19 ++++--------------- 3 files changed, 12 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index dd5d2b5acf664..e3a66e6bc303e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -1076,9 +1076,14 @@ void arm_smmu_write_cd_entry(struct arm_smmu_master *master, int ssid, struct arm_smmu_cd *cdptr, const struct arm_smmu_cd *target); +typedef void (*arm_smmu_make_cd_fn)(struct arm_smmu_cd *target, + struct arm_smmu_master *master, + struct arm_smmu_domain *smmu_domain); + int arm_smmu_set_pasid(struct arm_smmu_master *master, struct arm_smmu_domain *smmu_domain, ioasid_t pasid, - struct arm_smmu_cd *cd, struct iommu_domain *old); + struct arm_smmu_cd *cd, struct iommu_domain *old, + arm_smmu_make_cd_fn fn); void arm_smmu_domain_inv_range(struct arm_smmu_domain *smmu_domain, unsigned long iova, size_t size, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 414fc899140f7..4370cb88c57cf 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -273,8 +273,8 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain, * This does not need the arm_smmu_asid_lock because SVA domains never * get reassigned */ - arm_smmu_make_sva_cd(&target, master, smmu_domain); - ret = arm_smmu_set_pasid(master, smmu_domain, id, &target, old); + ret = arm_smmu_set_pasid(master, smmu_domain, id, &target, old, + arm_smmu_make_sva_cd); mmput(domain->mm); return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b10a68565e9df..7c075e64f842e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3733,13 +3733,8 @@ static int arm_smmu_s1_set_dev_pasid(struct iommu_domain *domain, if (smmu_domain->stage != ARM_SMMU_DOMAIN_S1) return -EINVAL; - /* - * We can read cd.asid outside the lock because arm_smmu_set_pasid() - * will fix it - */ - arm_smmu_make_s1_cd(&target_cd, master, smmu_domain); return arm_smmu_set_pasid(master, to_smmu_domain(domain), id, - &target_cd, old); + &target_cd, old, arm_smmu_make_s1_cd); } static void arm_smmu_update_ste(struct arm_smmu_master *master, @@ -3769,7 +3764,8 @@ static void arm_smmu_update_ste(struct arm_smmu_master *master, int arm_smmu_set_pasid(struct arm_smmu_master *master, struct arm_smmu_domain *smmu_domain, ioasid_t pasid, - struct arm_smmu_cd *cd, struct iommu_domain *old) + struct arm_smmu_cd *cd, struct iommu_domain *old, + arm_smmu_make_cd_fn arm_smmu_make_cd_fn) { struct iommu_domain *sid_domain = iommu_driver_get_domain_for_dev(master->dev); @@ -3800,14 +3796,7 @@ int arm_smmu_set_pasid(struct arm_smmu_master *master, if (ret) goto out_unlock; - /* - * We don't want to obtain to the asid_lock too early, so fix up the - * caller set ASID under the lock in case it changed. - */ - cd->data[0] &= ~cpu_to_le64(CTXDESC_CD_0_ASID); - cd->data[0] |= cpu_to_le64( - FIELD_PREP(CTXDESC_CD_0_ASID, smmu_domain->cd.asid)); - + arm_smmu_make_cd_fn(cd, master, smmu_domain); arm_smmu_write_cd_entry(master, pasid, cdptr, cd); arm_smmu_update_ste(master, sid_domain, state.ats_enabled); -- 2.43.0