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[192.35.156.11]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-27ed688226asm6880855ad.65.2025.09.24.19.14.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Sep 2025 19:14:42 -0700 (PDT) Message-ID: <5a6b3a3e-c6f6-ba39-9edf-eab3e1815862@oss.qualcomm.com> Date: Wed, 24 Sep 2025 19:14:41 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v2 07/10] phy: qualcomm: qmp-combo: Update QMP PHY with Glymur settings Content-Language: en-US To: Dmitry Baryshkov Cc: krzk+dt@kernel.org, conor+dt@kernel.org, kishon@kernel.org, vkoul@kernel.org, gregkh@linuxfoundation.org, robh@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250925005228.4035927-1-wesley.cheng@oss.qualcomm.com> <20250925005228.4035927-8-wesley.cheng@oss.qualcomm.com> From: Wesley Cheng In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: UGgf1d14CXjkJUFdRj0ku2D4TJL0tTTP X-Proofpoint-GUID: UGgf1d14CXjkJUFdRj0ku2D4TJL0tTTP X-Authority-Analysis: v=2.4 cv=No/Rc9dJ c=1 sm=1 tr=0 ts=68d4a595 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZdW6uxA9NKXbfdqeeS2OGA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=GfICSpz_d4rxbVQ3OkEA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIwMDAzNyBTYWx0ZWRfX90xN9rkZVpQn UzB98HLlWMmk4Xd6LuWSz78fgxtnwIbctL6SnJIERTtLSXQdLri0AbtdtPKSbtDs7m62zYrl1OM RxzWwjk6nVikCZR36OqLSC0cxwPigxtOQxenE7RnPb/9j5w1cEn7MAPVWxOeOXJP4CyqHJsn71Y SQAvUyaB/QFPwnjCxLq/GPzHCm05h88EBo7yXwJbHGHy4KtJwDms+wEO8WyX6X7g4DHjbDnudLx e4wAa/IdRM2/rtPi65hBKWiUilEtPzIlBUkltoYCNjPRfGt5KGvJD4LY7cseZ2+BL7nWQhr8JND JGzGt66BjtM9UAKEvCf0zS1oqW4JLUT1No87M11B70pUdZhmmz2VlaS8QqUQ03kUGnqyFJ7pZ7T LSiAnKod X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-24_07,2025-09-24_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 suspectscore=0 adultscore=0 malwarescore=0 phishscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509200037 On 9/24/2025 6:30 PM, Dmitry Baryshkov wrote: > On Wed, Sep 24, 2025 at 05:52:25PM -0700, Wesley Cheng wrote: >> For SuperSpeed USB to work properly, there is a set of HW settings that >> need to be programmed into the USB blocks within the QMP PHY. Ensure that >> these settings follow the latest settings mentioned in the HW programming >> guide. The QMP USB PHY on Glymur is a USB43 based PHY that will have some >> new ways to define certain registers, such as the replacement of TXA/RXA >> and TXB/RXB register sets. This was replaced with the LALB register set. >> >> There are also some PHY init updates to modify the PCS MISC register space. >> Without these, the QMP PHY PLL locking fails. >> >> Signed-off-by: Wesley Cheng >> --- >> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 311 ++++++++- >> .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h | 12 + >> .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h | 17 + >> .../phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h | 12 + >> .../qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h | 639 ++++++++++++++++++ >> .../phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h | 33 + >> .../phy-qcom-qmp-usb43-qserdes-com-v8.h | 224 ++++++ >> drivers/phy/qualcomm/phy-qcom-qmp.h | 4 + > > I think yo've squashed too many changes here. V5 and V6 headers should > be a part of the previous patch. > Hmm, not sure what went wrong there, but I will fix it shortly and submit as v3. >> 8 files changed, 1251 insertions(+), 1 deletion(-) >> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h >> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h >> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h >> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h >> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h >> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-qserdes-com-v8.h >>