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Tue, 11 Mar 2025 06:41:45 -0700 (PDT) Message-ID: <5a88dc9e-3952-478e-840c-5d6dac1cd81d@linaro.org> Date: Tue, 11 Mar 2025 14:41:42 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 18/21] drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU To: Dmitry Baryshkov Cc: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Jonathan Marek , Kuogee Hsieh , Neil Armstrong , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srini Kandagatla , Rob Clark References: <20250221-b4-sm8750-display-v3-0-3ea95b1630ea@linaro.org> <20250221-b4-sm8750-display-v3-18-3ea95b1630ea@linaro.org> <4y2nj6qxbbp7etuweoyarcg7vpbyemparzclj7ulb46rxk7k3s@s6wjrjebuc3g> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 21/02/2025 17:25, Dmitry Baryshkov wrote: >> -static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer, >> - struct dpu_plane_state *pstate, const struct msm_format *format) >> +static void _dpu_crtc_setup_blend_cfg(const struct dpu_hw_ctl *ctl, >> + struct dpu_crtc_mixer *mixer, >> + struct dpu_plane_state *pstate, >> + const struct msm_format *format) >> { >> struct dpu_hw_mixer *lm = mixer->hw_lm; >> uint32_t blend_op; >> - uint32_t fg_alpha, bg_alpha; >> + uint32_t fg_alpha, bg_alpha, max_alpha; >> >> fg_alpha = pstate->base.alpha >> 8; >> - bg_alpha = 0xff - fg_alpha; >> + if (ctl->mdss_ver->core_major_ver < 12) >> + max_alpha = 0xff; >> + else >> + max_alpha = 0x3ff; > > So, CTL is passed only to get struct dpu_mdss_version? It can either be > passed directly or fetched via dpu_kms->catalog->mdss_ver Ack. > >> + bg_alpha = max_alpha - fg_alpha; >> >> /* default to opaque blending */ >> if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || >> @@ -337,7 +343,7 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer, >> } else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) { >> blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | >> DPU_BLEND_BG_ALPHA_FG_PIXEL; >> - if (fg_alpha != 0xff) { >> + if (fg_alpha != max_alpha) { >> bg_alpha = fg_alpha; >> blend_op |= DPU_BLEND_BG_MOD_ALPHA | >> DPU_BLEND_BG_INV_MOD_ALPHA; >> @@ -348,7 +354,7 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer, >> /* coverage blending */ >> blend_op = DPU_BLEND_FG_ALPHA_FG_PIXEL | >> DPU_BLEND_BG_ALPHA_FG_PIXEL; >> - if (fg_alpha != 0xff) { >> + if (fg_alpha != max_alpha) { >> bg_alpha = fg_alpha; >> blend_op |= DPU_BLEND_FG_MOD_ALPHA | >> DPU_BLEND_FG_INV_MOD_ALPHA | >> @@ -482,7 +488,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, >> >> /* blend config update */ >> for (lm_idx = 0; lm_idx < cstate->num_mixers; lm_idx++) { >> - _dpu_crtc_setup_blend_cfg(mixer + lm_idx, pstate, format); >> + _dpu_crtc_setup_blend_cfg(ctl, mixer + lm_idx, pstate, format); >> >> if (bg_alpha_enable && !format->alpha_enable) >> mixer[lm_idx].mixer_op_mode = 0; >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c >> index 3bfb61cb83672dca4236bdbbbfb1e442223576d2..75bf3521b03c8e243ccfe1fc226aa71f23b296df 100644 >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c >> @@ -19,12 +19,20 @@ >> >> /* These register are offset to mixer base + stage base */ >> #define LM_BLEND0_OP 0x00 >> + >> +/* > #define LM_BLEND0_CONST_ALPHA 0x04 >> #define LM_FG_COLOR_FILL_COLOR_0 0x08 >> #define LM_FG_COLOR_FILL_COLOR_1 0x0C > > lowercase hex Ack > >> #define LM_FG_COLOR_FILL_SIZE 0x10 >> #define LM_FG_COLOR_FILL_XY 0x14 >> >> +/* >= v12 DPU */ >> +#define LM_BORDER_COLOR_0_V12 0x1C > > lowercase hex > >> +#define LM_BORDER_COLOR_1_V12 0x20 >> + >> +/* >= v12 DPU with offset to mixer base + stage base */ >> +#define LM_BLEND0_CONST_ALPHA_V12 0x08 > > This doesn't seem to be aligned properly That's only patch view... because I used tabs. I think existing code uses spaces, so I will switch to spaces. Best regards, Krzysztof