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Due to this the > framework only issues 1-1-1 write commands to the GQSPI driver. But the > GQSPI controller is capable of handling 1-4-4 write commands, so updated > the tx-buswidth to 4. > Using all 4 lines will increase the tx data transfer rate, as now the > tx data will be transferred on four lines instead on single line. > > Signed-off-by: Amit Kumar Mahapatra > Signed-off-by: Michal Simek > --- > > Changes in v2: > - Update commit message to skip spi-nor part - reported by Laurent > > arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts | 2 +- > 11 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts > index c1ab1ab690df..84e18fdce775 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts > @@ -124,7 +124,7 @@ spi_flash: flash@0 { /* MT25QU512A */ > #address-cells = <1>; > #size-cells = <1>; > reg = <0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > spi-max-frequency = <40000000>; /* 40MHz */ > partition@0 { > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts > index 48d6a7202406..04079d1704f1 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts > @@ -44,7 +44,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts > index e80484f9b137..3dec57cf18be 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts > @@ -45,7 +45,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts > index af3331c133ad..d9d1de5f313c 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts > @@ -355,7 +355,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts > index 05be71eab722..6636e76545a5 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts > @@ -173,7 +173,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; /* also DUAL configuration possible */ > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > index a074d8e2b86d..8767f147cbe3 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > @@ -957,7 +957,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts > index 91c9b77f6b1f..e185709c0d84 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts > @@ -444,7 +444,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts > index 954044d9899f..7fceebd1815c 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts > @@ -456,7 +456,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts > index ab5e34b43642..27b2416cb6d8 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts > @@ -964,7 +964,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts > index f31365a14f73..6224365826d8 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts > @@ -794,7 +794,7 @@ flash@0 { > #address-cells = <1>; > #size-cells = <1>; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ > spi-max-frequency = <108000000>; /* Based on DC1 spec */ > }; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts > index e615286b8eff..c406017b0348 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts > @@ -47,7 +47,7 @@ &qspi { > flash@0 { > compatible = "m25p80", "jedec,spi-nor"; > reg = <0x0>; > - spi-tx-bus-width = <1>; > + spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > spi-max-frequency = <108000000>; > }; Applied. M