From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D126C433EF for ; Tue, 28 Jun 2022 02:34:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245360AbiF1Ced (ORCPT ); Mon, 27 Jun 2022 22:34:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245202AbiF1C3E (ORCPT ); Mon, 27 Jun 2022 22:29:04 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 149AE1AE; Mon, 27 Jun 2022 19:29:01 -0700 (PDT) X-UUID: be4757cf47f44e05b59731bfa12648a2-20220628 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.7,REQID:11f3257e-e6aa-4990-8d72-ac6bd9625af4,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:87442a2,CLOUDID:42d4ef85-57f0-47ca-ba27-fe8c57fbf305,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: be4757cf47f44e05b59731bfa12648a2-20220628 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1070102612; Tue, 28 Jun 2022 10:28:57 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 28 Jun 2022 10:28:56 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 28 Jun 2022 10:28:56 +0800 Message-ID: <5b0613b9cc983e24a997c122b2892b35cf8346d3.camel@mediatek.com> Subject: Re: [PATCH v14 12/15] drm/mediatek: dpi: Add YUV422 output support From: Rex-BC Chen To: CK Hu , , , , , , , CC: , , , , , , , , , , Date: Tue, 28 Jun 2022 10:28:56 +0800 In-Reply-To: References: <20220624030946.14961-1-rex-bc.chen@mediatek.com> <20220624030946.14961-13-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2022-06-28 at 10:15 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Fri, 2022-06-24 at 11:09 +0800, Bo-Chen Chen wrote: > > Dp_intf supports YUV422 as output format. In MT8195 Chrome project, > > YUV422 output format is used for 4K resolution. > > > > To support this, it is also needed to support color format > > transfer. > > Color format transfer is a new feature for both dpi and dpintf of > > MT8195. > > > > The input format could be RGB888 and output format for dp_intf > > should > > be > > YUV422. Therefore, we add a mtk_dpi_matrix_sel() helper to update > > the > > DPI_MATRIX_SET register depending on the color format. > > > > Signed-off-by: Guillaume Ranquet > > Signed-off-by: Bo-Chen Chen > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 34 > > ++++++++++++++++++++++++- > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > > 2 files changed, 36 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 9e4250356342..438bf3bc5e4a 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -128,6 +128,7 @@ struct mtk_dpi_yc_limit { > > * @num_output_fmts: Quantity of supported output formats. > > * @is_ck_de_pol: Support CK/DE polarity. > > * @swap_input_support: Support input swap function. > > + * @color_fmt_trans_support: Enable color format transfer. > > * @dimension_mask: Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and > > VSYNC_PORCH > > * (no shift). > > * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift). > > @@ -144,6 +145,7 @@ struct mtk_dpi_conf { > > u32 num_output_fmts; > > bool is_ck_de_pol; > > bool swap_input_support; > > + bool color_fmt_trans_support; > > u32 dimension_mask; > > u32 hvsize_mask; > > u32 channel_swap_shift; > > @@ -412,6 +414,31 @@ static void mtk_dpi_config_disable_edge(struct > > mtk_dpi *dpi) > > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > > EDGE_SEL_EN); > > } > > > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > > + enum mtk_dpi_out_color_format format) > > +{ > > + u32 matrix_sel = 0; > > + > > + if (!dpi->conf->color_fmt_trans_support) { > > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); > > + return; > > + } > > + > > + switch (format) { > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > > I think the transform formula are different for full range and non- > full > range. Please make sure '0x2' is for full range or non-full range. If > you are not sure, you could provide the transform matrix of '0x2' so > we > could find out it's full or non-full. > > > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > > + if (dpi->mode.hdisplay <= 720) > > + matrix_sel = 0x2; > > Symbolize '0x2'. > > > + break; > > + default: > > + break; > > + } > > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > > INT_MATRIX_SEL_MASK); > > +} > > + > > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > > enum mtk_dpi_out_color_format > > format) > > { > > @@ -419,6 +446,7 @@ static void mtk_dpi_config_color_format(struct > > mtk_dpi *dpi, > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > > mtk_dpi_config_yuv422_enable(dpi, false); > > mtk_dpi_config_csc_enable(dpi, true); > > + mtk_dpi_matrix_sel(dpi, format); > > Why mt8173 support MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL but it does > not > call mtk_dpi_matrix_sel()? It seems that mt8173 also need to call > mtk_dpi_matrix_sel() but lost and this patch looks like a bug fix for > all SoC DPI driver. > > Regards, > CK > Hello CK, MT8173 does not support MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL as output format, the output format is: static const u32 mt8173_output_fmts[] = { MEDIA_BUS_FMT_RGB888_1X24, }; or do I misunderstand? BRs, Bo-Chen > > if (dpi->conf->swap_input_support) > > mtk_dpi_config_swap_input(dpi, false); > > mtk_dpi_config_channel_swap(dpi, > > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > > @@ -426,6 +454,7 @@ static void mtk_dpi_config_color_format(struct > > mtk_dpi *dpi, > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > > mtk_dpi_config_yuv422_enable(dpi, true); > > mtk_dpi_config_csc_enable(dpi, true); > > + mtk_dpi_matrix_sel(dpi, format); > > if (dpi->conf->swap_input_support) > > mtk_dpi_config_swap_input(dpi, true); > > else > > @@ -673,7 +702,10 @@ static int mtk_dpi_bridge_atomic_check(struct > > drm_bridge *bridge, > > dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS; > > dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB; > > dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB; > > - dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB; > > + if (out_bus_format == MEDIA_BUS_FMT_YUYV8_1X16) > > + dpi->color_format = > > MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL; > > + else > > + dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB; > > > > return 0; > > } > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > index 3a02fabe1662..cca0dccb84a2 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > @@ -217,4 +217,7 @@ > > > > #define EDGE_SEL_EN BIT(5) > > #define H_FRE_2N BIT(25) > > + > > +#define DPI_MATRIX_SET 0xB4 > > +#define INT_MATRIX_SEL_MASK GENMASK(4, 0) > > #endif /* __MTK_DPI_REGS_H */ > >