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From: Dinh Nguyen <dinguyen@kernel.org>
To: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney+clk@redhat.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] clk: socfpga: agilex: register the SP timer clocks early
Date: Mon, 12 Oct 2026 16:53:14 -0500	[thread overview]
Message-ID: <5b7d5543-5608-40fa-be5d-92600c2c9e70@kernel.org> (raw)
In-Reply-To: <b0214433cf10ebc094c6685f60a12abe58860523.1790935401.git.adrian.ho.yin.ng@altera.com>



On 10/2/26 05:22, Adrian Ng Ho Yin wrote:
> The DW APB timers are probed through TIMER_OF_DECLARE() from time_init()
> and cannot defer, but the clock manager is a platform driver registered
> at core_initcall(). The timer's clk_get() therefore fails and the timer
> is never brought up.
> 
> Register only l4_sp_clk and its parents (boot_clk, main_pll, periph_pll,
> main_pll_c1, peri_pll_c1 and noc_free_clk) from of_clk_init() using
> CLK_OF_DECLARE_DRIVER(), with every other clock left as -EPROBE_DEFER.
> The remaining clocks are still registered when the platform driver
> probes, which reuses the early provider.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
> ---
>   drivers/clk/socfpga/clk-agilex.c | 222 +++++++++++++++++++++++--------
>   1 file changed, 169 insertions(+), 53 deletions(-)
> 
> diff --git a/drivers/clk/socfpga/clk-agilex.c b/drivers/clk/socfpga/clk-agilex.c
> index 2bdea1997b5e..91a80b7b1886 100644
> --- a/drivers/clk/socfpga/clk-agilex.c
> +++ b/drivers/clk/socfpga/clk-agilex.c
> @@ -4,7 +4,9 @@
>    */
>   #include <linux/slab.h>
>   #include <linux/clk-provider.h>
> +#include <linux/io.h>

WHy do you need this include? Comment applies to all 3 patches.
The rest looks good to me.

Dinh

  reply	other threads:[~2026-10-12 21:53 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-02 10:22 [PATCH v2 0/3] clk: socfpga: " Adrian Ng Ho Yin
2026-10-02 10:22 ` [PATCH v2 1/3] clk: socfpga: agilex: " Adrian Ng Ho Yin
2026-10-12 21:53   ` Dinh Nguyen [this message]
2026-10-13  6:22     ` NG, ADRIAN HO YIN
2026-10-02 10:22 ` [PATCH v2 2/3] clk: socfpga: agilex5: " Adrian Ng Ho Yin
2026-10-02 10:22 ` [PATCH v2 3/3] clk: socfpga: stratix10: " Adrian Ng Ho Yin

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