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Thu, 13 Mar 2025 05:09:35 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52D59Y8T010387 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Mar 2025 05:09:34 GMT Received: from [10.217.216.178] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 12 Mar 2025 22:09:29 -0700 Message-ID: <5b81ba9f-810e-45c7-b991-ffa842b8c8eb@quicinc.com> Date: Thu, 13 Mar 2025 10:39:26 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 04/10] dt-bindings: clock: Add Qualcomm QCS615 Display clock controller To: Dmitry Baryshkov CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Ajit Pandey , Imran Shaik , Jagadeesh Kona , , , , , References: <20250221-qcs615-v5-mm-cc-v5-0-b6d9ddf2f28d@quicinc.com> <20250221-qcs615-v5-mm-cc-v5-4-b6d9ddf2f28d@quicinc.com> <5f5nt4g3fy7446gxnjg53n4uir57hm62ewgusekls5sbmadwez@pfxmhrkck3zi> Content-Language: en-US From: Taniya Das In-Reply-To: <5f5nt4g3fy7446gxnjg53n4uir57hm62ewgusekls5sbmadwez@pfxmhrkck3zi> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=D6NHKuRj c=1 sm=1 tr=0 ts=67d2688f cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=KKAkSRfTAAAA:8 a=COk6AnOGAAAA:8 a=xE1T1L2TKFzN_Gv-B-QA:9 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: FMbg4gB6mo_lieJXzZDMRy3-UERmBCph X-Proofpoint-ORIG-GUID: FMbg4gB6mo_lieJXzZDMRy3-UERmBCph X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-13_02,2025-03-11_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503130038 On 2/21/2025 7:44 PM, Dmitry Baryshkov wrote: > On Fri, Feb 21, 2025 at 02:50:15PM +0530, Taniya Das wrote: >> Add DT bindings for the Display clock on QCS615 platforms. Add the >> relevant DT include definitions as well. >> >> Reviewed-by: Dmitry Baryshkov > > I don't remember responding with it, nor does lore find such an email. > I'm totally confused, what is going on? > Dmitry, I will recheck all the series and update the tags and resend. >> Signed-off-by: Taniya Das >> --- >> .../bindings/clock/qcom,qcs615-dispcc.yaml | 73 ++++++++++++++++++++++ >> include/dt-bindings/clock/qcom,qcs615-dispcc.h | 52 +++++++++++++++ >> 2 files changed, 125 insertions(+) >