mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Robin Murphy <robin.murphy@arm.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>
Cc: "will.deacon@arm.com" <will.deacon@arm.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"Guohanjun (Hanjun Guo)" <guohanjun@huawei.com>,
	John Garry <john.garry@huawei.com>,
	"pabba@codeaurora.org" <pabba@codeaurora.org>,
	"vkilari@codeaurora.org" <vkilari@codeaurora.org>,
	"rruigrok@codeaurora.org" <rruigrok@codeaurora.org>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Linuxarm <linuxarm@huawei.com>,
	"neil.m.leeder@gmail.com" <neil.m.leeder@gmail.com>
Subject: Re: [PATCH v2 3/4] perf: add arm64 smmuv3 pmu driver
Date: Tue, 11 Sep 2018 11:24:54 +0100	[thread overview]
Message-ID: <5b98cd2c-02f7-0934-41c5-1da3e3557896@arm.com> (raw)
In-Reply-To: <5FC3163CFD30C246ABAA99954A238FA838785947@FRAEML521-MBX.china.huawei.com>

On 10/09/18 17:37, Shameerali Kolothum Thodi wrote:
[...]
>>> @@ -0,0 +1,838 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/* Copyright (c) 2017 The Linux Foundation. All rights reserved.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> +modify
>>> + * it under the terms of the GNU General Public License version 2 and
>>> + * only version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>
>> You don't really need to add the license text as well as SPDX. Except for the fact
>> that in this case they don't match - which is it?
> 
> Right. I will stick to SPDX-License-Identifier: GPL-2.0+

My question there is about the "+" - the license of the original patch 
was GPL-2.0, and I'm not sure about the legitimacy of quietly changing 
it to 2.0-or-later, especially without any visible agreement from 
previous contributors.

[...]
>> Also, how relevant is it going to be for future DT support? We don't really want
>> too many artificial dependencies on the way ACPI support happens to currently
>> be implemented.
> 
> Sorry, it's not clear to me what is proposed here as far as naming the PMU is
> concerned. Please see below as well.

Here I mean whether pdev->id is meaningful for OF platform devices in 
the same way as for IORT devices in terms of uniqueness - it may well 
be, but if it isn't then we should find a better alternative.

>>> +out:
>>> +	kfree(temp);
>>> +	return ret;
>>> +}
>>> +
>>> +
>>> +static char *smmu_pmu_assign_name(struct smmu_pmu *pmu) {
>>> +	unsigned long id;
>>> +	struct device *smmu, *dev = pmu->dev;
>>> +	char *s_name = NULL, *p_name = NULL;
>>> +
>>> +	smmu = iort_find_pmcg_ref_smmu(dev);
>>> +	if (smmu) {
>>> +		if (!smmu_pmu_get_dev_id(dev_name(smmu), &id))
>>> +			s_name = kasprintf(GFP_KERNEL,
>> "arm_smmu_v3_%lu", id);
>>> +	}
>>> +
>>> +	if (!s_name)
>>> +		s_name = kasprintf(GFP_KERNEL, "arm_smmu_v3");
>>
>> As I touched on before, I think it's worth generalising this from the start, and
>> trying to resolve the component reference to a struct device rather than
>> IORT/SMMU specific internals. However it also occurs to me that maybe this
>> isn't as important as it first seemed - since the auto-numbered ID doesn't
>> actually say which PMCG is which, the only way for the user to actually identify
>> which PMU is the correct one to count events for a particular endpoint is still to
>> grovel up the base address, so as long as the PMU name uniquely correlates to
>> the PMCG device, I'm not sure anything really matters beyond that.
> 
> So If I understand this correctly,
> 
> iort_find_pmcg_ref_smmu() should be something like  iort_find_pmcg_ref()
> which returns the associated struct device for the ref node and then, pmu is
> named as,
> 
> arm_smmu_v3_x_pmcg_y
> nc_dev_name_x_pmcg_y
> pciXXXX_pmcg_y  (It’s a bit tricky for RC as we will end up with struct pci_bus)
> 
> (where x and y are auto ids)
> 
> Please let me know if this is what is proposed here.

That's more or less what I was angling at, but as mentioned I realise 
it's fundamentally flawed (looking back at the original thread, I see it 
was me that proposed the idea, quelle suprise!)

Say you want to count events on one particular stream ID - how do you 
determine which of "arm_smmu_v3_0_pmcg_0" to "arm_smmu_v3_0_pmcg_6" 
represents the actual TBU that can see that SID? Sure, you have a *bit* 
more information than if they were just named, say, "arm_pmcg_0" to 
"arm_pmcg_6", but it's not actually *useful* information because those 
IDs only really represent the probe order, and that depends entirely on 
the IORT/DT order and whatever Linux felt like doing.

Thus if going to all this effort to compose a complex name still doesn't 
actually help the user in most cases, is it worth it? I'm starting to 
think not.

> It is possible to include the pmcg base address instead of the auto-numbered id
> as proposed in v1 series.

That's probably the most robust option for now unless anyone can come up 
with a better idea (I do wonder about doing something horrible with 
pmu->dev.parent...) My bad for missing that rather subtle point the 
first time around, sorry everyone!

Robin.

  reply	other threads:[~2018-09-11 10:25 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-24 11:45 [PATCH v2 0/4] arm64 SMMUv3 PMU driver with IORT support Shameer Kolothum
2018-07-24 11:45 ` [PATCH v2 1/4] acpi: arm64: add iort support for PMCG Shameer Kolothum
2018-09-07 15:36   ` Robin Murphy
2018-09-10 16:08     ` Shameerali Kolothum Thodi
2018-07-24 11:45 ` [PATCH v2 2/4] acpi: arm64: iort helper to find the associated smmu of pmcg node Shameer Kolothum
2018-09-07 15:42   ` Robin Murphy
2018-07-24 11:45 ` [PATCH v2 3/4] perf: add arm64 smmuv3 pmu driver Shameer Kolothum
2018-09-10 11:02   ` Robin Murphy
2018-09-10 16:37     ` Shameerali Kolothum Thodi
2018-09-11 10:24       ` Robin Murphy [this message]
2018-09-12  8:32         ` Shameerali Kolothum Thodi
2018-09-17 17:10     ` John Garry
2018-09-18 11:47       ` Will Deacon
2018-09-18 12:16         ` Robin Murphy
2018-09-18 13:15           ` John Garry
2018-07-24 11:45 ` [PATCH v2 4/4] perf/smmuv3: Add MSI irq support Shameer Kolothum
2018-09-10 11:14   ` Robin Murphy
2018-09-10 16:55     ` Shameerali Kolothum Thodi
2018-08-01  8:52 ` [PATCH v2 0/4] arm64 SMMUv3 PMU driver with IORT support Shameerali Kolothum Thodi
2018-08-01 10:20   ` Robin Murphy

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5b98cd2c-02f7-0934-41c5-1da3e3557896@arm.com \
    --to=robin.murphy@arm.com \
    --cc=guohanjun@huawei.com \
    --cc=john.garry@huawei.com \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=neil.m.leeder@gmail.com \
    --cc=pabba@codeaurora.org \
    --cc=rruigrok@codeaurora.org \
    --cc=shameerali.kolothum.thodi@huawei.com \
    --cc=vkilari@codeaurora.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®