From: Michal Simek <michal.simek@amd.com>
To: <linux-kernel@vger.kernel.org>, <monstr@monstr.eu>,
<michal.simek@xilinx.com>, <git@xilinx.com>
Cc: Conor Dooley <conor+dt@kernel.org>,
Guenter Roeck <linux@roeck-us.net>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"Naman Trivedi Manojbhai" <naman.trivedimanojbhai@amd.com>,
Rob Herring <robh+dt@kernel.org>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>,
<devicetree@vger.kernel.org>,
kishore Manne <nava.kishore.manne@amd.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH] dt-bindings: firmware: xilinx: Describe missing child nodes
Date: Tue, 19 Dec 2023 15:54:43 +0100 [thread overview]
Message-ID: <5bb16305a05692de29ee2aa2accc793e23b68dec.1702997680.git.michal.simek@amd.com> (raw)
Firmware node has more than fpga, aes and clock child nodes but also power,
reset, gpio, pinctrl and pcap which are not described yet.
All of them have binding in separate files but there is missing connection
to firmware node that's why describe it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
.../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
index 3d578f98ae2c..0662544f86f0 100644
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
@@ -53,6 +53,37 @@ properties:
vector.
type: object
+ zynqmp-power:
+ $ref: /schemas/power/reset/xlnx,zynqmp-power.yaml#
+ description: The zynqmp-power node describes the power management
+ configurations. It will control remote suspend/shutdown interfaces.
+ type: object
+
+ reset-controller:
+ $ref: /schemas/reset/xlnx,zynqmp-reset.yaml#
+ description: The reset-controller node describes connection to the reset
+ functionality via firmware interface.
+ type: object
+
+ gpio:
+ $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
+ description: The gpio node describes connect to PS_MODE pins via firmware
+ interface.
+ type: object
+
+ pinctrl:
+ $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
+ description: The pinctrl node provides access to pinconfig and pincontrol
+ functionality available in firmware.
+ type: object
+
+ pcap:
+ $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml
+ description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
+ configure the Programmable Logic (PL). The configuration uses the
+ firmware interface.
+ type: object
+
clock-controller:
$ref: /schemas/clock/xlnx,versal-clk.yaml#
description: The clock controller is a hardware block of Xilinx versal
--
2.36.1
next reply other threads:[~2023-12-19 14:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-19 14:54 Michal Simek [this message]
2023-12-20 7:53 ` Krzysztof Kozlowski
2023-12-20 7:57 ` Michal Simek
2023-12-20 8:18 ` Krzysztof Kozlowski
2023-12-20 8:20 ` Michal Simek
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