support for non-uniform SPI NOR flash memories

[Tudor Ambarus <tudor.ambarus@microchip.com>]

Hi, Marek, all,

I'm studying Cyrille's patch for non-uniform SPI NOR flash memories:
https://lkml.org/lkml/2017/4/15/70.

It's not clear to me whether interleaved regions are possible or not. I
read the JEDEC Standard No. 216B and it looks like each region is well
delimited, there is no such thing as interleaved regions (see section
6.5):

"When there is more than one sector size in a device, each contiguous
group of sectors, that are of the same size, and support the same erase
types, is called a region."

If interleaved regions are not possible, the code can be simplified. Do
I miss something, is there anything else that I should read in this
regard?

Apart of how we represent the regions, there is some improvement that we
can do. When in a region, I see that is preferred the biggest possible
erase type that meets all the conditions. If so, we can iterate from the
biggest erase type to the smallest, and when find one that meets all the
conditions, break the loop.

Thanks,
ta