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Thu, 23 Jan 2025 10:40:21 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50NAeK0o019532 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 23 Jan 2025 10:40:20 GMT Received: from [10.216.27.253] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 23 Jan 2025 02:40:15 -0800 Message-ID: <5bd43ab2-68a0-47b7-b9c2-5b6d0726cc16@quicinc.com> Date: Thu, 23 Jan 2025 16:10:10 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V7 2/5] interconnect: qcom: Add multidev EPSS L3 support To: Bjorn Andersson CC: Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Odelu Kukatla , Mike Tipton , "Vivek Aknurwar" , Sibi Sankar , , , , References: <20250111161429.51-1-quic_rlaggysh@quicinc.com> <20250111161429.51-3-quic_rlaggysh@quicinc.com> Content-Language: en-US From: Raviteja Laggyshetty In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: bdaUswPB7Dm6W-_oIuATGuSejKFxE1bB X-Proofpoint-GUID: bdaUswPB7Dm6W-_oIuATGuSejKFxE1bB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-23_04,2025-01-22_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 spamscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501230081 On 1/12/2025 2:38 AM, Bjorn Andersson wrote: > On Sat, Jan 11, 2025 at 04:14:26PM +0000, Raviteja Laggyshetty wrote: >> EPSS on SA8775P has two instances which requires creation of two device >> nodes with different compatible and device data because of unique >> icc node id and name limitation in interconnect framework. >> Add multidevice support to osm-l3 code to get unique node id from icc >> framework. >> >> Signed-off-by: Raviteja Laggyshetty >> --- >> drivers/interconnect/qcom/osm-l3.c | 91 ++++++++++++++++++++++-------- >> 1 file changed, 67 insertions(+), 24 deletions(-) >> >> diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c >> index 6a656ed44d49..8e98d1c9a840 100644 >> --- a/drivers/interconnect/qcom/osm-l3.c >> +++ b/drivers/interconnect/qcom/osm-l3.c >> @@ -1,6 +1,7 @@ >> // SPDX-License-Identifier: GPL-2.0 >> /* >> * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. >> + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. >> */ >> >> #include >> @@ -11,6 +12,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include >> @@ -34,6 +36,9 @@ >> >> #define OSM_L3_MAX_LINKS 1 >> >> +#define OSM_L3_NODE_ID_START 10000 >> +#define OSM_NODE_NAME_SUFFIX_SIZE 10 >> + >> #define to_osm_l3_provider(_provider) \ >> container_of(_provider, struct qcom_osm_l3_icc_provider, provider) >> >> @@ -55,46 +60,40 @@ struct qcom_osm_l3_icc_provider { >> */ >> struct qcom_osm_l3_node { >> const char *name; >> - u16 links[OSM_L3_MAX_LINKS]; >> + const char *links[OSM_L3_MAX_LINKS]; >> u16 id; >> u16 num_links; >> u16 buswidth; >> }; >> >> struct qcom_osm_l3_desc { >> - const struct qcom_osm_l3_node * const *nodes; >> + struct qcom_osm_l3_node * const *nodes; >> size_t num_nodes; >> unsigned int lut_row_size; >> unsigned int reg_freq_lut; >> unsigned int reg_perf_state; >> }; >> >> -enum { >> - OSM_L3_MASTER_NODE = 10000, >> - OSM_L3_SLAVE_NODE, >> -}; >> - >> -#define DEFINE_QNODE(_name, _id, _buswidth, ...) \ >> - static const struct qcom_osm_l3_node _name = { \ >> +#define DEFINE_QNODE(_name, _buswidth, ...) \ >> + static struct qcom_osm_l3_node _name = { \ >> .name = #_name, \ >> - .id = _id, \ >> .buswidth = _buswidth, \ >> .num_links = COUNT_ARGS(__VA_ARGS__), \ >> - .links = { __VA_ARGS__ }, \ >> + __VA_OPT__(.links = { #__VA_ARGS__ }) \ >> } >> >> -DEFINE_QNODE(osm_l3_master, OSM_L3_MASTER_NODE, 16, OSM_L3_SLAVE_NODE); >> -DEFINE_QNODE(osm_l3_slave, OSM_L3_SLAVE_NODE, 16); >> +DEFINE_QNODE(osm_l3_master, 16, osm_l3_slave); >> +DEFINE_QNODE(osm_l3_slave, 16); >> >> -static const struct qcom_osm_l3_node * const osm_l3_nodes[] = { >> +static struct qcom_osm_l3_node * const osm_l3_nodes[] = { >> [MASTER_OSM_L3_APPS] = &osm_l3_master, >> [SLAVE_OSM_L3] = &osm_l3_slave, >> }; >> >> -DEFINE_QNODE(epss_l3_master, OSM_L3_MASTER_NODE, 32, OSM_L3_SLAVE_NODE); >> -DEFINE_QNODE(epss_l3_slave, OSM_L3_SLAVE_NODE, 32); >> +DEFINE_QNODE(epss_l3_master, 32, epss_l3_slave); >> +DEFINE_QNODE(epss_l3_slave, 32); >> >> -static const struct qcom_osm_l3_node * const epss_l3_nodes[] = { >> +static struct qcom_osm_l3_node * const epss_l3_nodes[] = { >> [MASTER_EPSS_L3_APPS] = &epss_l3_master, >> [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave, >> }; >> @@ -123,6 +122,19 @@ static const struct qcom_osm_l3_desc epss_l3_l3_vote = { >> .reg_perf_state = EPSS_REG_L3_VOTE, >> }; >> >> +static u16 get_node_id_by_name(const char *node_name, >> + const struct qcom_osm_l3_desc *desc) >> +{ >> + struct qcom_osm_l3_node *const *nodes = desc->nodes; >> + int i; >> + >> + for (i = 0; i < desc->num_nodes; i++) { >> + if (!strcmp(nodes[i]->name, node_name)) >> + return nodes[i]->id; >> + } >> + return 0; >> +} >> + >> static int qcom_osm_l3_set(struct icc_node *src, struct icc_node *dst) >> { >> struct qcom_osm_l3_icc_provider *qp; >> @@ -164,10 +176,11 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) >> const struct qcom_osm_l3_desc *desc; >> struct icc_onecell_data *data; >> struct icc_provider *provider; >> - const struct qcom_osm_l3_node * const *qnodes; >> + struct qcom_osm_l3_node * const *qnodes; >> struct icc_node *node; >> size_t num_nodes; >> struct clk *clk; >> + u64 addr; >> int ret; >> >> clk = clk_get(&pdev->dev, "xo"); >> @@ -188,6 +201,10 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) >> if (!qp) >> return -ENOMEM; >> >> + ret = of_property_read_reg(pdev->dev.of_node, 0, &addr, NULL); >> + if (ret) >> + return ret; >> + >> qp->base = devm_platform_ioremap_resource(pdev, 0); >> if (IS_ERR(qp->base)) >> return PTR_ERR(qp->base); >> @@ -242,26 +259,51 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) >> >> icc_provider_init(provider); >> >> + /* create icc nodes */ >> for (i = 0; i < num_nodes; i++) { >> - size_t j; >> + char *node_name; >> + size_t len; >> >> - node = icc_node_create(qnodes[i]->id); >> + node = icc_node_create_alloc_id(OSM_L3_NODE_ID_START); >> if (IS_ERR(node)) { >> ret = PTR_ERR(node); >> goto err; >> } >> + qnodes[i]->id = node->id; >> + >> + /* len = strlen(node->name) + @ + 8 (base-address) + NULL */ >> + len = strlen(qnodes[i]->name) + OSM_NODE_NAME_SUFFIX_SIZE; >> + node_name = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); >> + if (!node_name) { >> + ret = -ENOMEM; >> + goto err; >> + } >> + >> + snprintf(node_name, len, "%s@%08llx", qnodes[i]->name, addr); >> + node->name = node_name; > > I don't think it's reasonable to duplicate this logic and the decision > of naming convention in each provider driver. Please provide a generic > solution in the framework. > I will be moving the logic to framework. > > PS. Not that I want you to use it here, but for the next time be aware > of devm_kasprintf(). > Will make use of devm_kasprintf in the next patch revision. >> >> - node->name = qnodes[i]->name; >> /* Cast away const and add it back in qcom_osm_l3_set() */ >> node->data = (void *)qnodes[i]; >> icc_node_add(node, provider); >> >> - for (j = 0; j < qnodes[i]->num_links; j++) >> - icc_link_create(node, qnodes[i]->links[j]); >> - >> data->nodes[i] = node; >> } >> >> + /* create links in topolgy */ >> + for (i = 0; i < num_nodes; i++) { >> + size_t j; >> + >> + node = data->nodes[i]; >> + for (j = 0; j < qnodes[i]->num_links; j++) { >> + u16 link_node_id = get_node_id_by_name(qnodes[i]->links[j], desc); > > Isn't that O(i^2*j) string comparisons? I don't find that acceptable. Agreed, I will be linking the nodes using pointers instead of strings, this will avoid additional loops and lookups while creating the links. > >> + >> + if (link_node_id) >> + icc_link_create(node, link_node_id); >> + else >> + goto err; >> + } >> + } >> + >> ret = icc_provider_register(provider); >> if (ret) >> goto err; >> @@ -284,6 +326,7 @@ static const struct of_device_id osm_l3_of_match[] = { >> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, >> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, >> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, >> + { .compatible = "qcom,sa8775p-epss-l3", .data = &epss_l3_perf_state }, > > With the exception of sc8180x, this list is sorted alphabetically. > Please insert your entry where it makes sense. > Sure, I will fix it in next patch series. > Regards, > Bjorn > >> { } >> }; >> MODULE_DEVICE_TABLE(of, osm_l3_of_match); >> -- >> 2.39.2 >>