From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752853AbdEPUOi (ORCPT ); Tue, 16 May 2017 16:14:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40964 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750930AbdEPUOh (ORCPT ); Tue, 16 May 2017 16:14:37 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 95AF780B20 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=eric.auger@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 95AF780B20 Subject: Re: [PATCH 1/2] PCI: Allow PCI_DEV_FLAGS_NO_BUS_RESET to be used on bus device. To: David Daney , Bjorn Helgaas , linux-pci@vger.kernel.org References: <20170516001736.4001-1-david.daney@cavium.com> <20170516001736.4001-2-david.daney@cavium.com> Cc: Jon Masters , Robert Richter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org From: Auger Eric Message-ID: <5bda1ecc-55ac-199c-5a7b-c8cf154382a2@redhat.com> Date: Tue, 16 May 2017 22:14:31 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <20170516001736.4001-2-david.daney@cavium.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 16 May 2017 20:14:36 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 16/05/2017 02:17, David Daney wrote: > When checking to see if a PCI bus can safely be reset, we check to see > if any of the children have their PCI_DEV_FLAGS_NO_BUS_RESET flag set. > As these devices are know not to behave well after a bus reset. nit: s/know/known > > Some PCIe root port bridges also do not behave well after a bus reset, > sometimes causing the devices behind the bridge to become unusable. > > Add a check for the PCI_DEV_FLAGS_NO_BUS_RESET flag being set in the > bridge device to allow these bridges to be flagged, and prevent their > buses from being reset. > > A follow on patch will add a quirk for this type of bridge. > > Signed-off-by: David Daney Thanks Eric > --- > drivers/pci/pci.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index b01bd5b..b64e4d1 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -4318,6 +4318,10 @@ static bool pci_bus_resetable(struct pci_bus *bus) > { > struct pci_dev *dev; > > + > + if (bus->self && (bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET)) > + return false; > + > list_for_each_entry(dev, &bus->devices, bus_list) { > if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || > (dev->subordinate && !pci_bus_resetable(dev->subordinate))) >