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ORIGINATING; auth=pass smtp.auth=pza@pengutronix.de smtp.mailfrom=p.zabel@pengutronix.de ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=pengutronix.de; s=20260414; t=1792588138; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NACHf3MpA2Z29v6RpiB327pgryw33carefl3Um/1JYc=; b=MbUI2xy/T2JvUfljrMMoGD+NaxevJ5ArDj3fnSudjSm1Zzp2mpAh9/7/XKc/07JIQXBwhQ ple4g8cTZ6BIbTmtvKUE79INCYUa1o/Rga1HDlbLYV16hBBNxMNdSnBzrrTxvkCXK/xLtV l4Kv4qDgaD4Itzug/Po7SngurSI5Hb28jtODZjSmV8s5OXG6QzTXGLSf9gTZEKEbaFMA+x 7S0+rLktSUDSmgY/6yDNRKwtss9alTDYcmQOOAzxzcPyL5bAmMlGlWa56npUyp59lX/wh2 IYsz4cn9E311q5/KauA8AHkm2WK9E2c1AG5RAURyeZrgbTeirci7hKTXa315AQ== Message-ID: <5bf7f29d89ecc415ac5d7a3d62d0eac4c46e3a1f.camel@pengutronix.de> Subject: Re: [PATCH] reset: spacemit: Fix the RCPU2 PWM reset registers From: Philipp Zabel To: Hung-Chun Tseng , Guodong Xu , Yixun Lan Cc: Troy Mitchell , Alex Elder , linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org Date: Wed, 21 Oct 2026 15:08:58 +0200 In-Reply-To: <20261017140805.3278709-1-alan.tseng.cs@gmail.com> References: <20261017140805.3278709-1-alan.tseng.cs@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-0+deb13u1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 On Sa, 2026-10-17 at 22:08 +0800, Hung-Chun Tseng wrote: > Every entry in k1_rcpu2_resets[] uses RCPU2_PWM9_CLK_RST, so asserting > or deasserting the reset of any RCPU2 PWM from 0 to 8 acts on PWM9 > instead. Each PWM has its own register, RCPU2_PWMn_CLK_RST at offset > 4 * n, as k1-syscon.h already defines. >=20 > On a Milk-V Jupiter running the vendor kernel, which uses RCPU2 PWM2 > for the fan, the RCPU2 registers read: >=20 > 0x00: 0x4 0x04: 0x4 0x08: 0x1 0x0c: 0x4 ... 0x24: 0x4 >=20 > Only PWM2's register has its reset deasserted, which matches one > register per PWM. >=20 > Use the matching register for each reset. No in-tree device tree uses > the RCPU2 PWMs yet, so this has no effect on current boards, but it > would break the first one that does. >=20 > Build-tested only (riscv defconfig, W=3D1); the fix could not be tested > at runtime, as mainline has no RCPU2 PWM node to exercise it. >=20 > Fixes: c479d7cf06c3 ("reset: spacemit: add support for SpacemiT CCU reset= s") > Assisted-by: claude-opus-5-5 Drop, see 1e035297ffda ("docs: remove Assisted-by references"). Otherwise, Reviewed-by: Philipp Zabel regards Philipp