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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-679b685f5a9sm504990a12.26.2026.04.28.02.24.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 02:24:34 -0700 (PDT) Message-ID: <5c7d64d6-6fc8-4323-894d-56d1dffa7d09@oss.qualcomm.com> Date: Tue, 28 Apr 2026 11:24:31 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] arm64: dts: qcom: eliza: Describe the ADSP and USB related nodes To: Krishna Kurapati PSSNV , Abel Vesa Cc: Wesley Cheng , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260331-eliza-adsp-usb-v1-0-d8a251be20c3@oss.qualcomm.com> <20260331-eliza-adsp-usb-v1-1-d8a251be20c3@oss.qualcomm.com> <69d644bd-d64e-4ef4-b0ca-b47103e84764@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI4MDA4MiBTYWx0ZWRfX+9li05HEaLcy xO/dwTBb5egC+6WsLLgU+4q6Ot8J5GuCcp4OG8vf94Os7WwQ4kjM4qDwBV7nqImHs7kxAoLKVK/ oonPxmLncOQ8sp0GpihfEnJCpJKCts4vqALGuHXdMMFgRoMUhwEBNtAyKVJjW9dq6UWRnTpFo7i cnsF2fq1uPrOLYdWudvEj6yd+9vorS5MXcKTFfHbiUiW7vMIu1GKt5f6x8eUFzpOzWHpn/4MbSv skFT3q71X3iqgfCdqYXG8qV4bv3sd8Rsz07zMYbPMw7o4LpwdAAIm3f97ac/r2RvPSYehJXtM+W RTBhJlCCAHk2wS/Fbkj174HnnTkR2DOAHPaP2oFGab9u2IdG5eez0S+J4AADRe3cPuxVsJcnIab /g+ai3wAGy6UPCHVBw5KEqownJgzlHJMaA6/dZgj7B9eocN7RpjNo3txJSeQ2p0oPUVfAPJmLoo H26A6KlLXEkbwdhuMpw== X-Authority-Analysis: v=2.4 cv=V69NF+ni c=1 sm=1 tr=0 ts=69f07cd5 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=HraIJQmpyVBdKkQOmRcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-GUID: kRC7cML_SQrGcvqE6yt4BIGcj3puX0Jn X-Proofpoint-ORIG-GUID: kRC7cML_SQrGcvqE6yt4BIGcj3puX0Jn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_02,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 suspectscore=0 adultscore=0 spamscore=0 phishscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604280082 On 4/28/26 7:46 AM, Krishna Kurapati PSSNV wrote: > On Wed, Apr 22, 2026 at 3:55 PM Abel Vesa wrote: >> >> On 26-04-22 12:09:31, Konrad Dybcio wrote: >>> On 4/22/26 11:41 AM, Abel Vesa wrote: >>>> On 26-03-31 15:37:08, Konrad Dybcio wrote: >>>>> On 3/31/26 12:37 PM, Abel Vesa wrote: >>>>>> Describe the ADSP remoteproc node along with its dependencies, including >>>>>> the IPCC mailbox, AOSS QMP and SMP2P links used for communication. >>>>>> >>>>>> The Eliza SoC features a USB 3.1 Gen 2 controller connected to a QMP >>>>>> combo PHY and an SNPS eUSB2 PHY. Describe them. >>>>>> >>>>>> Signed-off-by: Abel Vesa >>>>>> --- >>>>> >>>>> [...] >>>>> >>>>>> + usb_hsphy: phy@88e3000 { >>>>>> + compatible = "qcom,eliza-snps-eusb2-phy", >>>>>> + "qcom,sm8550-snps-eusb2-phy"; >>>>>> + reg = <0x0 0x088e3000 0x0 0x154>; >>>>>> + #phy-cells = <0>; >>>>>> + >>>>>> + clocks = <&rpmhcc RPMH_CXO_CLK>; >>>>> >>>>> This is TCSR_USB2_CLKREF_EN >>>> >>>> Good point. Will fix. >>>> >>>>> >>>>> >>>>>> + usb: usb@a600000 { >>>>>> + compatible = "qcom,eliza-dwc3", "qcom,snps-dwc3"; >>>>> >>>>> Does the device suspend and resume successfully? >>>> >>>> Well, tested with pm_test devices and it does suspend and resume >>>> successfully, but there is this: >>>> >>>> [ 54.584126] dwc3-qcom a600000.usb: port-1 HS-PHY not in L2 >>>> >>>> But if I'm not mistaken, this is valid accross all SNPS eUSB2 PHYs, on >>>> all platforms that have them. >>> >>> Well it's not fatal, but ideally this wouldn't be there. Maybe you're missing >>> some DWC quirk in the list, although it seems pretty long already. Perhaps >>> Wesley would know more. >> >> + Wesley >> > > As per HPG and downstream, this is what needs to be done while entering suspend: > > 1. Clear PWR_EVNT_LPM_IN_L2_MASK bit of pwr_evnt_irq_stat_reg > 2. Clear PWR_EVNT_LPM_OUT_L2_MASK bit of pwr_evnt_irq_stat_reg > 3. Set the following bits in the pwr_evnt_irq_stat_reg: > a) DWC3_GUSB2PHYCFG_ENBLSLPM and DWC3_GUSB2PHYCFG_SUSPHY In case that's related, most platforms (including this one), set snps,dis_enblslpm_quirk which prevents the first bit from being set Likewise, snps,dis_u2_susphy_quirk for the second one (although it looks like setting these bits is currently unconditional upon suspend in HOST mode?) As for the sequence you mentioned, I believe the diff below should be OK - although it _really_ just adds some delay vs the current state, since the bits are cleared in the resume call diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index f43f73ac36ff..e7b1775b7207 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -344,10 +345,18 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) return 0; for (i = 0; i < qcom->num_ports; i++) { - val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]); - if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) + /* Wait for the PHYs to go into L2 */ + ret = readl_poll_timeout(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i], + val, val & PWR_EVNT_LPM_IN_L2_MASK, + 10, 3 * USEC_PER_MSEC); + + if (ret == -ETIMEDOUT) dev_err(qcom->dev, "port-%d HS-PHY not in L2\n", i + 1); } + + /* Clear L2 event bit */ + writel(PWR_EVNT_LPM_IN_L2_MASK, qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]); + clk_bulk_disable_unprepare(qcom->num_clocks, qcom->clks); ret = dwc3_qcom_interconnect_disable(qcom); @@ -752,6 +761,13 @@ static int dwc3_qcom_pm_suspend(struct device *dev) bool wakeup = device_may_wakeup(dev); int ret; + /* Clear previous L2 events */ + for (int i = 0; i < qcom->num_ports; i++) { + writel(PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK, + qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]); + } + ret = dwc3_pm_suspend(&qcom->dwc); if (ret) return ret; Konrad