From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752697AbdJLKJ4 (ORCPT ); Thu, 12 Oct 2017 06:09:56 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:8010 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752501AbdJLKJy (ORCPT ); Thu, 12 Oct 2017 06:09:54 -0400 Subject: Re: [PATCH v2 03/16] iommu: introduce iommu invalidate API function To: "Liu, Yi L" , Jean-Philippe Brucker , Joerg Roedel References: <1507244624-39189-1-git-send-email-jacob.jun.pan@linux.intel.com> <1507244624-39189-4-git-send-email-jacob.jun.pan@linux.intel.com> <20171010133542.juag7cwbivlb56sl@8bytes.org> <20171010150953.4095a045@jacob-builder> <20171011095126.GD30803@8bytes.org> <20171011121534.GG30803@8bytes.org> <3cdbce19-9264-b2d0-745b-8d32d5b8cfe7@arm.com> <541498d5-0478-0b9a-6c01-12f7dc30ebf3@huawei.com> CC: "Lan, Tianyu" , "Liu, Yi L" , Greg Kroah-Hartman , "Wysocki, Rafael J" , LKML , "iommu@lists.linux-foundation.org" , David Woodhouse From: Bob Liu Message-ID: <5cc5b52c-27da-7bb5-4968-e46ed6d44fc0@huawei.com> Date: Thu, 12 Oct 2017 18:07:59 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.142.83.150] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090201.59DF3F3C.0069,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: a2dd066251a555b640eee39a096ec11a Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017/10/12 17:50, Liu, Yi L wrote: > > >> -----Original Message----- >> From: Bob Liu [mailto:liubo95@huawei.com] >> Sent: Thursday, October 12, 2017 5:39 PM >> To: Jean-Philippe Brucker ; Joerg Roedel >> ; Liu, Yi L >> Cc: Lan, Tianyu ; Liu, Yi L ; Greg >> Kroah-Hartman ; Wysocki, Rafael J >> ; LKML ; >> iommu@lists.linux-foundation.org; David Woodhouse >> Subject: Re: [PATCH v2 03/16] iommu: introduce iommu invalidate API function >> >> On 2017/10/11 20:48, Jean-Philippe Brucker wrote: >>> On 11/10/17 13:15, Joerg Roedel wrote: >>>> On Wed, Oct 11, 2017 at 11:54:52AM +0000, Liu, Yi L wrote: >>>>> I didn't quite get 'iovm' mean. Can you explain a bit about the idea? >>>> >>>> It's short for IO Virtual Memory, basically a replacement term for 'svm' >>>> that is not ambiguous (afaik) and not specific to Intel. >>> >>> I wonder if SVM originated in OpenCL first, rather than intel? That's >>> why I'm using it, but it is ambiguous. I'm not sure IOVM is precise >>> enough though, since the name could as well be used without shared >>> tables, for classical map/unmap and IOVAs. Kevin Tian suggested SVA >>> "Shared Virtual Addressing" last time, which is a little more clear >>> than SVM and isn't used elsewhere in the kernel either. >>> >> >> The process "vaddr" can be the same as "IOVA" by using the classical map/unmap >> way. >> This is also a kind of share virtual memory/address(except have to pin physical >> memory). >> How to distinguish these two different implementation of "share virtual >> memory/address"? >> > [Liu, Yi L] Not sure if I get your idea well. Process "vaddr" is owned by process and > maintained by mmu, while "IOVA" is maintained by iommu. So they are different in the > way they are maintained. Since process "vaddr" is maintained by mmu and then used by > iommu, so we call it shared virtual memory/address. This is how "shared" term comes. I think from the view of application, the share virtual memory/address(or Nvidia-CUDA unify virtual address) is like this: 1. vaddr = malloc(); e.g vaddr=0x10000 2. device can get the same data(accessing the same physical memory) through same address e.g 0x10000, and don't care about it's a vaddr or IOVA.. (actually in Nvidia-cuda case, the data will be migrated between system-ddr and gpu-memory, but the vaddr is always the same for CPU and GPU). So there are two ways(beside Nvidia way) to implement this requirement: 1) get the physical memory of vaddr; dma_map the paddr to iova; If we appoint iova = vaddr (e.g iova can be controlled by the user space driver through vfio DMA_MAP), This can also be called share virtual address between CPU process and device.. 2) The second way is what this RFC did.