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([2a01:e0a:106d:1080:ddd5:3880:40aa:e4f9]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4872459a5d2sm19600201f8f.31.2026.09.21.02.53.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Sep 2026 02:53:25 -0700 (PDT) Message-ID: <5ce1688b-e903-4503-85a7-cc0432aa6103@linaro.org> Date: Mon, 21 Sep 2026 11:53:24 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: Neil Armstrong Subject: Re: [PATCH v2 0/2] drm/msm/a6xx: use correct timestamp counter on A750 GPU To: Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20260909-topic-sm8650-gmu-a750-timestamp-reg-v2-0-091d74958951@linaro.org> <7128505e-c8c9-4d00-96f9-2576ea2a0fda@oss.qualcomm.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <7128505e-c8c9-4d00-96f9-2576ea2a0fda@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/15/26 23:20, Akhil P Oommen wrote: > > > On 9/9/2026 6:37 PM, Neil Armstrong wrote: >> The A750 uses a different counter register as used on the downstream >> driver: >> >> static u64 gen7_9_0_read_alwayson(struct adreno_device *adreno_dev) >> { >> ... >> /* Always use the GMU AO counter when doing a AHB read */ >> gmu_core_regread(device, GEN7_GMU_CX_AO_COUNTER_HI, &hi); >> gmu_core_regread(device, GEN7_GMU_CX_AO_COUNTER_LO, &lo); >> ... >> } >> >> gen7_reg.h:#define GEN7_GMU_CX_AO_COUNTER_LO 0x1f880 >> gen7_reg.h:#define GEN7_GMU_CX_AO_COUNTER_HI 0x1f881 >> >> Signed-off-by: Neil Armstrong > > Reviewed-by: Akhil P Oommen > > This is correct. There was a register shuffling in the gmu_cx block in a750 and another shuffling later in gen8 family. > > It is a good idea to review other GMU_CX* register offsets with KGSL. Also, please consider including a fixes tag. OK thanks, Neil > > -Akhil. > > >> --- >> Changes in v2: >> - Fix swapped H/L registers in XML >> - Link to v1: https://patch.msgid.link/20260908-topic-sm8650-gmu-a750-timestamp-reg-v1-0-284880d6e68b@linaro.org >> >> --- >> Neil Armstrong (2): >> drm/msm/a6xx: Add CX AO Counter registers used for a750 GPUs >> drm/msm/a6xx: Use CX AO Counter register for timestamp on a750 GPUs >> >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++++++++--- >> drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 2 ++ >> 2 files changed, 11 insertions(+), 3 deletions(-) >> --- >> base-commit: df2908090cda368b01ff43709f51890076c56157 >> change-id: 20260908-topic-sm8650-gmu-a750-timestamp-reg-2e7575e6279d >> >> Best regards, >> -- >> Neil Armstrong >