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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-64b3f5633b1sm1961449a12.19.2025.12.17.02.07.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Dec 2025 02:07:18 -0800 (PST) Message-ID: <5d258204-097b-49e1-a53a-d35f846ecfa8@oss.qualcomm.com> Date: Wed, 17 Dec 2025 11:07:17 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: talos: Add PMU support To: yuanjie yang , andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tingwei.zhang@oss.qualcomm.com References: <20251217092057.462-1-yuanjie.yang@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251217092057.462-1-yuanjie.yang@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE3MDA4MCBTYWx0ZWRfX35frgDdQA08P JQWoCmm1zaD9ypHt07doEtTSObk5kw3SrJ20POx1jrmarbUDxeqcVvtwqyWlEQJnXPXIMA7/eA7 CZLwVNyGQ8vqKU7EMa5kf89YaVtG37Fi63g94E82iKc4kMCRf+HQq055GzEjBZ1h3nk/O4nxP+k ZsCHTdKSl7DsesoQSMe/qX0HMQglTck2IX2T4iRNThdIAhges6VGmTvYrsXG6hndg0ujLAzAXy3 uvXlg4djSfTHFFWomZqvmxgRXEeNu4+QIPg7modZWRrPRSGLU33Nx1fMU9N/G5JE7kffZYGR3oy Atf6RoTmFTDseW4aauC2sPz7o0PsM3eXRdtWFMIDJLwS5PcaJYr71VCJaGZOnJN/zk64KZ4F8iK uiMj5OpN6WMaPbDI7fjceDSrthwBFg== X-Proofpoint-ORIG-GUID: nPVCOuUFTW-EY0dSN5xRPi1QV4N-cqDl X-Proofpoint-GUID: nPVCOuUFTW-EY0dSN5xRPi1QV4N-cqDl X-Authority-Analysis: v=2.4 cv=edgwvrEH c=1 sm=1 tr=0 ts=694280d8 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=BD0yUqfNhgjro36wMb4A:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-17_01,2025-12-16_05,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 adultscore=0 priorityscore=1501 phishscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512170080 On 12/17/25 10:20 AM, yuanjie yang wrote: > From: Yuanjie Yang > > Add the PMU node for talos platforms. > > Signed-off-by: Yuanjie Yang > --- Check out: 9ce52e908bd5 ("arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions") 2c06e0797c32 ("arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs") You'll have to do the same since the interrupt is shared Konrad > arch/arm64/boot/dts/qcom/talos.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi > index 95d26e313622..3ba1e3c1d1d7 100644 > --- a/arch/arm64/boot/dts/qcom/talos.dtsi > +++ b/arch/arm64/boot/dts/qcom/talos.dtsi > @@ -555,6 +555,16 @@ opp-128000000 { > }; > }; > > + pmu-a55 { > + compatible = "arm,cortex-a55-pmu"; > + interrupts = ; > + }; > + > + pmu-a76 { > + compatible = "arm,cortex-a76-pmu"; > + interrupts = ; > + }; > + > psci { > compatible = "arm,psci-1.0"; > method = "smc";