From: Rohit Agarwal <quic_rohiagar@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>, <agross@kernel.org>,
<andersson@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<dmitry.baryshkov@linaro.org>
Cc: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/3] arm64: dts: qcom: Add interconnect nodes for SDX75
Date: Tue, 3 Oct 2023 13:34:23 +0530 [thread overview]
Message-ID: <5d99708e-95a0-401b-b636-4f535fdd5905@quicinc.com> (raw)
In-Reply-To: <35703a29-5c5a-47a8-9a4b-04953dc3faba@linaro.org>
On 9/27/2023 4:17 PM, Konrad Dybcio wrote:
> On 26.09.2023 11:29, Rohit Agarwal wrote:
>> Add interconnect nodes to support interconnects on SDX75.
>> Also parallely add the interconnect property for UART required
>> so that the bootup to shell does not break with interconnects
>> in place.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> ---
> [...]
>
>> scm: scm {
>> compatible = "qcom,scm-sdx75", "qcom,scm";
>> @@ -434,6 +448,8 @@
>> clock-names = "m-ahb",
>> "s-ahb";
>> iommus = <&apps_smmu 0xe3 0x0>;
>> + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>;
> 0 -> QCOM_ICC_TAG_ALWAYS (dt-bindings/interconnect/qcom,icc.h)
Ok, Let me update this.
Thanks,
Rohit.
>
> Konrad
next prev parent reply other threads:[~2023-10-03 8:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-26 9:29 [PATCH v2 0/3] Add devicetree support of Interconnects and USB " Rohit Agarwal
2023-09-26 9:29 ` [PATCH v2 1/3] arm64: dts: qcom: Add interconnect nodes " Rohit Agarwal
2023-09-27 10:47 ` Konrad Dybcio
2023-10-03 8:04 ` Rohit Agarwal [this message]
2023-10-01 20:56 ` kernel test robot
2023-09-26 9:29 ` [PATCH v2 2/3] arm64: dts: qcom: Add USB3 and PHY support on SDX75 Rohit Agarwal
2023-09-26 9:29 ` [PATCH v2 3/3] arm64: dts: qcom: sdx75-idp: Enable USB3 and PHY support Rohit Agarwal
2023-09-27 10:48 ` Konrad Dybcio
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