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([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-31c3e958166sm2318999a91.5.2025.07.10.07.10.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Jul 2025 07:10:13 -0700 (PDT) Message-ID: <5db9ec69-d0e4-4113-a989-ac75d0f1e5dd@rivosinc.com> Date: Thu, 10 Jul 2025 16:10:03 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] selftests: riscv: add misaligned access testing To: Andreas Schwab Cc: linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Palmer Dabbelt , Paul Walmsley , Shuah Khan , Alexandre Ghiti References: <20250710133506.994476-1-cleger@rivosinc.com> Content-Language: en-US From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10/07/2025 15:53, Andreas Schwab wrote: > On Jul 10 2025, Clément Léger wrote: > >> This selftest tests all the currently emulated instructions (except for >> the RV32 compressed ones which are left as a future exercise for a RV32 >> user). For the FPU instructions, all the FPU registers are tested. > > If that didn't catch the missing sign extension that I just fixed in > , you > should consider extending the tests. > Hi Andreas, you link doesn't work and I didn't find anything about sign extension except a patch you wrote for arch_cmpxg(). Thanks, Clément