From: Lokesh Vutla <lokeshvutla@ti.com>
To: Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] arm64: dts: ti: Drop reg-io-width/reg-shift from UART nodes
Date: Wed, 9 Jun 2021 19:43:15 +0530 [thread overview]
Message-ID: <5e7116ce-0cf0-2615-eaef-f4e0f653e86b@ti.com> (raw)
In-Reply-To: <20210607134558.23704-1-vigneshr@ti.com>
On 07/06/21 7:15 pm, Vignesh Raghavendra wrote:
> 8250_omap compatible UART IPs on all SoCs have registers aligned at 4
> byte address boundary and constant byte addressability. Thus there is no
> need for reg-io-width or reg-shift DT properties. These properties are
> not used by 8250_omap driver nor documented as part of binding document.
> Therefore drop them.
>
> This is in preparation to move omap-serial.txt to YAML format.
>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Thanks and regards,
Lokesh
next prev parent reply other threads:[~2021-06-09 14:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 13:45 Vignesh Raghavendra
2021-06-09 14:13 ` Lokesh Vutla [this message]
2021-06-11 19:00 ` Nishanth Menon
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