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Tue, 16 Jul 2024 17:51:42 +0000 Message-ID: <5e9d6516-abe7-405b-8db9-52c381559c58@intel.com> Date: Tue, 16 Jul 2024 10:51:38 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 06/20] x86/resctrl: Add support to enable/disable AMD ABMC feature To: , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <706a061d-c9bf-48d5-834c-67ae1ba4729d@amd.com> From: Reinette Chatre Content-Language: en-US In-Reply-To: <706a061d-c9bf-48d5-834c-67ae1ba4729d@amd.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MW4PR04CA0050.namprd04.prod.outlook.com (2603:10b6:303:6a::25) To SJ2PR11MB7573.namprd11.prod.outlook.com (2603:10b6:a03:4d2::10) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR11MB7573:EE_|SN7PR11MB7540:EE_ X-MS-Office365-Filtering-Correlation-Id: 68becf2f-b838-4f98-021c-08dca5bff374 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|376014|7416014|1800799024; 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Reset the >>> architectural state so that reading of hardware counter is not considered >>> as an overflow in next update. >>> >>> The ABMC feature details are documented in APM listed below [1]. >>> [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming >>> Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth >>> Monitoring (ABMC). >>> >>> Signed-off-by: Babu Moger >>> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 >>> --- >>> v5: Renamed resctrl_abmc_enable to resctrl_arch_abmc_enable. >>>      Renamed resctrl_abmc_disable to resctrl_arch_abmc_disable. >>>      Introduced resctrl_arch_get_abmc_enabled to get abmc state from >>>      non-arch code. >>>      Renamed resctrl_abmc_set_all to _resctrl_abmc_enable(). >>>      Modified commit log to make it clear about AMD ABMC feature. >>> >>> v3: No changes. >>> >>> v2: Few text changes in commit message. >>> --- >>>   arch/x86/include/asm/msr-index.h       |  1 + >>>   arch/x86/kernel/cpu/resctrl/internal.h | 13 +++++ >>>   arch/x86/kernel/cpu/resctrl/rdtgroup.c | 66 ++++++++++++++++++++++++++ >>>   3 files changed, 80 insertions(+) >>> >>> diff --git a/arch/x86/include/asm/msr-index.h >>> b/arch/x86/include/asm/msr-index.h >>> index 01342963011e..263b2d9d00ed 100644 >>> --- a/arch/x86/include/asm/msr-index.h >>> +++ b/arch/x86/include/asm/msr-index.h >>> @@ -1174,6 +1174,7 @@ >>>   #define MSR_IA32_MBA_BW_BASE        0xc0000200 >>>   #define MSR_IA32_SMBA_BW_BASE        0xc0000280 >>>   #define MSR_IA32_EVT_CFG_BASE        0xc0000400 >>> +#define MSR_IA32_L3_QOS_EXT_CFG        0xc00003ff >>>     /* MSR_IA32_VMX_MISC bits */ >>>   #define MSR_IA32_VMX_MISC_INTEL_PT                 (1ULL << 14) >>> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h >>> b/arch/x86/kernel/cpu/resctrl/internal.h >>> index 2bd207624eec..0ce9797f80fe 100644 >>> --- a/arch/x86/kernel/cpu/resctrl/internal.h >>> +++ b/arch/x86/kernel/cpu/resctrl/internal.h >>> @@ -97,6 +97,9 @@ cpumask_any_housekeeping(const struct cpumask *mask, >>> int exclude_cpu) >>>       return cpu; >>>   } >>>   +/* Setting bit 0 in L3_QOS_EXT_CFG enables the ABMC feature */ >> >> Please be consistent throughout series to have sentences end with period. > > Sure. > >> >>> +#define ABMC_ENABLE            BIT(0) >>> + >>>   struct rdt_fs_context { >>>       struct kernfs_fs_context    kfc; >>>       bool                enable_cdpl2; >>> @@ -477,6 +480,7 @@ struct rdt_parse_data { >>>    * @mbm_cfg_mask:    Bandwidth sources that can be tracked when Bandwidth >>>    *            Monitoring Event Configuration (BMEC) is supported. >>>    * @cdp_enabled:    CDP state of this resource >>> + * @abmc_enabled:    ABMC feature is enabled >>>    * >>>    * Members of this structure are either private to the architecture >>>    * e.g. mbm_width, or accessed via helpers that provide abstraction. e.g. >>> @@ -491,6 +495,7 @@ struct rdt_hw_resource { >>>       unsigned int        mbm_width; >>>       unsigned int        mbm_cfg_mask; >>>       bool            cdp_enabled; >>> +    bool            abmc_enabled; >>>   }; >> >> mbm_cntr_enabled? This is architecture specific code so there is more >> flexibility >> here, but it may make implementation easier to understand if consistent >> naming is used >> between fs and arch code. > > How about "mbm_cntr_assign_enabled" or "cntr_assign_enabled" ? My preference is to keep the term "mbm_cntr" to be consistent with the other variables/struct members to help when reading the code. "mbm_cntr_assign_enabled" does seem to be getting long though. Are you planning to use it by assigning it to a local variable with shorter name? As a sidenote, I will be offline for large portions of the next few weeks and thus unresponsive during this time. I'll be back to a regular schedule on August 12th. Reinette