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Fri, 31 Oct 2025 07:03:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHDF9l8JSchzVCtnoQy5ijK1zVjnL6sazsdFxSMnthezTtq0WVV9lEBoxlg1IFoIeZ7pl0tdg== X-Received: by 2002:a5d:64e9:0:b0:427:6a4:93d0 with SMTP id ffacd0b85a97d-429bd6be770mr3064634f8f.59.1761919438661; Fri, 31 Oct 2025 07:03:58 -0700 (PDT) Received: from gmonaco-thinkpadt14gen3.rmtit.csb ([185.107.56.30]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429c13e0311sm3616052f8f.30.2025.10.31.07.03.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Oct 2025 07:03:57 -0700 (PDT) Message-ID: <5ee084ed5fea93aced2a3d78ddb480e84b57a68c.camel@redhat.com> Subject: Re: [RESEND PATCH v13 0/9] timers: Exclude isolated cpus from timer migration From: Gabriele Monaco To: Frederic Weisbecker , Waiman Long Cc: Thomas Gleixner , linux-kernel@vger.kernel.org, Anna-Maria Behnsen Date: Fri, 31 Oct 2025 15:03:56 +0100 In-Reply-To: References: <20251020112802.102451-1-gmonaco@redhat.com> <3c1e6b45-79b8-463a-8c41-565d9ed8f76d@redhat.com> <5457560d-f48a-4a99-8756-51b1017a6aab@redhat.com> <3ac28b2bf33086a77333791df39b779d55c31df0.camel@redhat.com> <84511fa7-3a28-425c-b0fd-8d971a5f7eb1@redhat.com> <4421ec3d-e4df-4645-9b68-261080bd4760@redhat.com> Autocrypt: addr=gmonaco@redhat.com; prefer-encrypt=mutual; keydata=mDMEZuK5YxYJKwYBBAHaRw8BAQdAmJ3dM9Sz6/Hodu33Qrf8QH2bNeNbOikqYtxWFLVm0 1a0JEdhYnJpZWxlIE1vbmFjbyA8Z21vbmFjb0BrZXJuZWwub3JnPoiZBBMWCgBBFiEEysoR+AuB3R Zwp6j270psSVh4TfIFAmjKX2MCGwMFCQWjmoAFCwkIBwICIgIGFQoJCAsCBBYCAwECHgcCF4AACgk Q70psSVh4TfIQuAD+JulczTN6l7oJjyroySU55Fbjdvo52xiYYlMjPG7dCTsBAMFI7dSL5zg98I+8 cXY1J7kyNsY6/dcipqBM4RMaxXsOtCRHYWJyaWVsZSBNb25hY28gPGdtb25hY29AcmVkaGF0LmNvb T6InAQTFgoARAIbAwUJBaOagAULCQgHAgIiAgYVCgkICwIEFgIDAQIeBwIXgBYhBMrKEfgLgd0WcK eo9u9KbElYeE3yBQJoymCyAhkBAAoJEO9KbElYeE3yjX4BAJ/ETNnlHn8OjZPT77xGmal9kbT1bC1 7DfrYVISWV2Y1AP9HdAMhWNAvtCtN2S1beYjNybuK6IzWYcFfeOV+OBWRDQ== Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-2.fc42) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-10-31 at 14:48 +0100, Frederic Weisbecker wrote: > Le Thu, Oct 30, 2025 at 01:57:50PM -0400, Waiman Long a =C3=A9crit : > > These 2 cpuset patches are actually independent of the timer related > > changes. The purpose of these two patches are to prevent the cpuset cod= e > > from adding isolated CPUs in such a way that all the nohz_full HK CPUs > > become domain-isolated. This is a corner case that normal users won't t= ry to > > do. The patches are just an insurance policy to ensure that users can't= do > > that. This is complementary to the sched/isolation patch that limits wh= at > > CPUs can be put to the isolcpus and nohz_full boot parameters. All thes= e > > patches are independent of the timer related changes, though you can sa= y > > that the solution will only be complete if all the pieces are in place. >=20 > Right but there will be a conflict if the timer patches don't have > the rename of update_unbound_workqueue_cpumask(). >=20 Waiman, are you referring to [1]? Since that is an RFC, couldn't you just take in those patches before mergin= g [1] and adapt just that one directly in the cpuset tree? I guess git should fig= ure it out if we keep my cpuset patches in both trees (or at least 5/9), as lon= g as the conflicts come in later commits. Different story is if you already took some conflicting patches in, then I = can look into rebasing as Frederic suggests. Thanks, Gabriele [1] - https://lore.kernel.org/lkml/20251025064844.495525-8-chenridong@huaweicloud= .com > > There are another set of pending cpuset patches from Chen Ridong that d= oes > > some restructuring of the cpuset code that will likely have some confli= cts > > with these 2 patches. So I would like to settle the cpuset changes to a= void > > future conflicts. >=20 > Ok so it looks like there will be conflicts eventually during the merge > window. In that case it makes sense to take Gabriel cpuset patches but > he'll need to rebase the rest on top of the timer tree. >=20 > Thanks. >=20 > >=20 > > Cheers, > > Longman > >=20