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Subject: Re: [PATCH] x86, msr: Better document AMD "tweak MSRs", rename
 MSR_F15H_IC_CFG
To: Borislav Petkov <bp@alien8.de>
References: <20170425114541.8267-1-dvlasenk@redhat.com>
 <20170425115948.6hekn2xklodjil7e@pd.tnic>
 <785f402c-a830-1d23-545e-289fb14a84a8@redhat.com>
 <20170425125913.5nnd436dz54q7cld@pd.tnic>
Cc: Ingo Molnar <mingo@redhat.com>, Andy Lutomirski <luto@kernel.org>,
        Brian Gerst <brgerst@gmail.com>, Peter Zijlstra <peterz@infradead.org>,
        "H. Peter Anvin" <hpa@linux.intel.com>, x86@kernel.org,
        linux-kernel@vger.kernel.org
From: Denys Vlasenko <dvlasenk@redhat.com>
Message-ID: <5ef2c044-3044-4983-61d7-68f651dd8ee9@redhat.com>
Date: Tue, 25 Apr 2017 15:05:41 +0200
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On 04/25/2017 02:59 PM, Borislav Petkov wrote:
> On Tue, Apr 25, 2017 at 02:16:55PM +0200, Denys Vlasenko wrote:
>> However, all IBS registers are in this range.
>
> I knew you were gonna say that. But IBS registers are architectural too
> in the sense that they are behind a CPUID bit.
>
>> DRi_ADDR_MASK are in this range - and these are very useful, likely to
>> stay.
>
> Those are too behind a CPUID bit.
>
>> In the arch/x86/include/asm/msr-index.h file we already have
>> three "tweak" MSRs defined with "AMD64":
>>
>> #define MSR_AMD64_LS_CFG               0xc0011020
>> #define MSR_AMD64_DC_CFG               0xc0011022
>> #define MSR_AMD64_BU_CFG2              0xc001102a
>>
>> I just noticed that we have a fourth one in
>> arch/x86/kernel/cpu/amd.c:
>>
>> #define MSR_AMD64_DE_CFG       0xC0011029
>
> That's wrong. I think we should call those something else but not
> "AMD64".

Okay. Propose a naming scheme for these which looks god to you.


> Perhaps the families for which the workaround is being applied.
> In the last case, MSR_F12H_DE_CFG, for example. And yes, I should've
> paid attention to that but ...

A bit problematic:

MSR C001_1020 is used (mentioned in Rev Guides as a possible way
to work around an errata) by all Fams starting from K8, except Fam15h.

MSR C001_1022 is used by K8, 10h, 15h.

Etc...