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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f703831b5csm7282451a12.65.2025.04.29.04.10.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 29 Apr 2025 04:10:03 -0700 (PDT) Message-ID: <5f4a2b6d-3757-4a4a-ab27-187efde90b46@oss.qualcomm.com> Date: Tue, 29 Apr 2025 13:10:01 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] serial: qcom-geni: Enable support for half-duplex mode To: Anup Kulkarni , gregkh@linuxfoundation.org, jirislaby@kernel.org, johan+linaro@kernel.org, dianders@chromium.org, konradybcio@kernel.org, u.kleine-koenig@baylibre.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: andersson@kernel.org, quic_msavaliy@quicinc.com, quic_vdadhani@quicinc.com References: <20250429104339.321962-1-quic_anupkulk@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250429104339.321962-1-quic_anupkulk@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: uTnO-QswW0_5zk8Lo_l6v9AtvscIM666 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI5MDA4MiBTYWx0ZWRfX5OzF6cA+AesL AUzolzLrQHG2SDVDXrJEM+iZx4Dtf/QVPl5AN0KEP+QvQCvClr1Tz011I32IRzTko+9gO/kPI+c QV7XhCxtD2ZnXgHnnAw0UjodbUHNxx+StSyBpttPWQPK27/uU40tlxHwmMdNsMq0DZoIUVTEJwm U0YP/1vkDhaZESEmnQk3jSW0xWXQrtfB4OCrgGUPxLZ9g1mOxKUN/aOhXloDrxcOEMqhsjMFjIi CXJV50CBpCThc4OSQbGMYpqAdvwDa6O2ezZ4ES7KsScaClWsR5g9FGNwuepFKfloneNaICBwHlv l5RqpvtiIde5PSaYvcn7nCoci6z/IOMc04BBqarrMTCbwzd/frbldfycvBsjSqKGNKCzg+Y8fBH npA5MKCtPTzEXF/uWW4bXKT+Rj+jZNwO+pUaPUUVSR2r5qFm/loCwETtpSMxFws+wwZuYV8i X-Proofpoint-GUID: uTnO-QswW0_5zk8Lo_l6v9AtvscIM666 X-Authority-Analysis: v=2.4 cv=DKWP4zNb c=1 sm=1 tr=0 ts=6810b38d cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=_eVvX3NImPkpd70kKkkA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-29_04,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 impostorscore=0 mlxscore=0 bulkscore=0 malwarescore=0 phishscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504290082 On 4/29/25 12:43 PM, Anup Kulkarni wrote: > Currently the RTS pin is used as flow control in the UART controller by > default.For half-duplex modes, use the RTS pin for direction control to > prevent data collisions by allowing only one direction at a time. Utilize > the rs485 structure and callbacks in the serial core framework to support > half-duplex modes. Use the IOCTL value, 'TIOCSRS485', and the 'struct > serial_rs485' supported by the serial framework to implement support for > related callbacks. Enable RS485 mode with these callbacks. > > Signed-off-by: Anup Kulkarni > --- [...] > +static void qcom_geni_set_rts_pin(struct uart_port *uport, bool pin_state) > +{ > + u32 rfr = UART_MANUAL_RFR_EN; > + > + /* Set the logical level of RTS GPIO pin based on the bool variable. */ This comment doesn't add much > + rfr |= pin_state ? UART_RFR_NOT_READY : UART_RFR_READY; > + writel(rfr, uport->membase + SE_UART_MANUAL_RFR); > +} > + > static int qcom_geni_serial_request_port(struct uart_port *uport) > { > struct platform_device *pdev = to_platform_device(uport->dev); > @@ -637,6 +650,7 @@ static void qcom_geni_serial_start_tx_dma(struct uart_port *uport) > struct tty_port *tport = &uport->state->port; > unsigned int xmit_size; > u8 *tail; > + bool pin_state; > int ret; > > if (port->tx_dma_addr) > @@ -648,6 +662,12 @@ static void qcom_geni_serial_start_tx_dma(struct uart_port *uport) > xmit_size = kfifo_out_linear_ptr(&tport->xmit_fifo, &tail, > UART_XMIT_SIZE); > > + if (uport->rs485.flags & SER_RS485_ENABLED) { > + /* For RS485 mode, the RTS can be set/cleared before transmission */ This comment is incorrectly indented (need 1 more tab) [...] > if (dma) { > - if (dma_tx_status & TX_DMA_DONE) > + if (dma_tx_status & TX_DMA_DONE) { > qcom_geni_serial_handle_tx_dma(uport); > + // Check if RS485 mode is enabled > + if (uport->rs485.flags & SER_RS485_ENABLED) { > + // Determine the RTS pin state based on the > + // RS485 RTS_AFTER_SEND flag. > + pin_state = !!(uport->rs485.flags & SER_RS485_RTS_AFTER_SEND); > + // Set or clear the RTS pin according to the determined state > + qcom_geni_set_rts_pin(uport, pin_state); All of these comments repeat what the code says quite clearly [...] > + } > + } > > if (dma_rx_status) { > if (dma_rx_status & RX_RESET_DONE) > @@ -1594,6 +1624,29 @@ static void qcom_geni_serial_pm(struct uart_port *uport, > } > } > > +/** > + * qcom_geni_rs485_config - Configure RS485 settings for the UART port > + * @uport: Pointer to the UART port structure > + * @termios: Pointer to the termios structure > + * @rs485: Pointer to the RS485 configuration structure > + * > + * This function configures the RTS (Request to Send) pin behavior for RS485 mode. > + * When RS485 mode is enabled, the RTS pin is kept in the ACTIVE state. > + * When RS485 mode is disabled, the RTS pin is controlled by the QUP hardware for auto flow control. > + * > + * Return: Always returns 0. > + */ > + > +static int qcom_geni_rs485_config(struct uart_port *uport, > + struct ktermios *termios, struct serial_rs485 *rs485) > +{ > + if (rs485->flags & SER_RS485_ENABLED) Because SER_RS485_ENABLED is always checked before calling qcom_geni_set_rts_pin(), it may make more sense to combine that and this function, perhaps calling it from qcom_geni_serial_start_tx_dma() too Konrad > + qcom_geni_set_rts_pin(uport, true); // Set RTS pin to ACTIVE state > + else > + writel(0, uport->membase + SE_UART_MANUAL_RFR); // Revert to auto flow control > + return 0; > +}