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X-CSE-ConnectionGUID: d+qMDseaTf6ybfMHTrojjg== X-CSE-MsgGUID: mOsinrhnRguOaSINn76DSA== X-IronPort-AV: E=McAfee;i="6700,10204,11348"; a="58174869" X-IronPort-AV: E=Sophos;i="6.13,296,1732608000"; d="scan'208";a="58174869" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Feb 2025 14:27:28 -0800 X-CSE-ConnectionGUID: H6MXhDhjR9qUAOs2t4/SgA== X-CSE-MsgGUID: 9u130mWdQsWiiYGxS7mGTQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="115006326" Received: from mgoodin-mobl2.amr.corp.intel.com (HELO [10.125.109.220]) ([10.125.109.220]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Feb 2025 14:27:27 -0800 Message-ID: <5f4d58fe-4fa1-4b59-81a7-e8c8d3030d0a@intel.com> Date: Tue, 18 Feb 2025 14:27:31 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 06/12] x86/mm: use INVLPGB for kernel TLB flushes To: Rik van Riel , Yosry Ahmed Cc: Peter Zijlstra , x86@kernel.org, linux-kernel@vger.kernel.org, bp@alien8.de, dave.hansen@linux.intel.com, zhengqi.arch@bytedance.com, nadav.amit@gmail.com, thomas.lendacky@amd.com, kernel-team@meta.com, linux-mm@kvack.org, akpm@linux-foundation.org, jackmanb@google.com, jannh@google.com, mhklinux@outlook.com, andrew.cooper3@citrix.com, Manali Shukla References: <20250213161423.449435-1-riel@surriel.com> <20250213161423.449435-7-riel@surriel.com> <20250214194013.GA2198@noisy.programming.kicks-ass.net> <3e26626aa1c01aaa5d1e7b42d3ffbd632c3264fb.camel@surriel.com> <724d17ce3fbe07d1d9404f8f32ba518071bcfa4a.camel@surriel.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 2/18/25 10:00, Rik van Riel wrote: > On Sat, 2025-02-15 at 02:08 +0000, Yosry Ahmed wrote: >> So I think what Dave wants (and I agree) is: >> if (!broadcast_kernel_range_flush(info)) >> ipi_kernel_range_flush(info) >> >> Where ipi_kernel_range_flush() contains old_thing1() and oldthing2(). That's OK-ish. But it still smells of hacking in the new concept without refactoring things properly. Let's logically inline the code that we've got. I think it actually ends up looking something like this: if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) { if (info->end == TLB_FLUSH_ALL) { invlpgb_flush_all(); } else { for_each(addr) invlpgb_flush_addr_nosync(addr, nr); } } else { if (info->end == TLB_FLUSH_ALL) on_each_cpu(do_flush_tlb_all, NULL, 1); else on_each_cpu(do_kernel_range_flush, info, 1); } Where we've got two inputs: 1. INVLPGB support (or not) 2. TLB_FLUSH_ALL (basically ranged or full flush) So I think we should group by *one* of those. The above groups by INVLPGB support and this groups by TLB_FLUSH_ALL: if (info->end == TLB_FLUSH_ALL) { if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) { invlpgb_flush_all(); } else { on_each_cpu(do_flush_tlb_all, NULL, 1); } } else { if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) for_each(addr) invlpgb_flush_addr_nosync(addr, nr); else on_each_cpu(do_kernel_range_flush, info, 1); } So, if we create some helpers that give some consistent naming: static tlb_flush_all_ipi(...) { on_each_cpu(do_flush_tlb_all, NULL, 1); } static tlb_flush_all(...) { if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) invlpgb_flush_all(...); else tlb_flush_all_ipi(...); } and then also create the ranged equivalents (which internally have the same cpu_feature_enabled() check): tlb_flush_range_ipi(...) invlpgb_flush_range(...) Then we can have the top-level code be: if (info->end == TLB_FLUSH_ALL) tlb_flush_all(info); else tlb_flush_range(info); That actually looks way nicer than what we have today. For bonus points, if a third way of flushing the TLB showed up, it would slot right in: static tlb_flush_all(...) { if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) invlpgb_flush_all(...); + else if cpu_feature_enabled(X86_FEATURE_RAR)) + rar_flush_all(...); else tlb_flush_all_ipi(...); } That's *exactly* the way we want the code to read. At the higher level, it's deciding based on the generic thing that *everybody* cares about: ranged or full flush. Then, at the lower level, it's deciding how to implement that high-level flush concept.