From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753598AbdCMU02 (ORCPT ); Mon, 13 Mar 2017 16:26:28 -0400 Received: from mail-he1eur01on0066.outbound.protection.outlook.com ([104.47.0.66]:30794 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752397AbdCMU0S (ORCPT ); Mon, 13 Mar 2017 16:26:18 -0400 Authentication-Results: spf=pass (sender IP is 188.184.36.46) smtp.mailfrom=cern.ch; gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=bestguesspass action=none header.from=cern.ch; Subject: Re: [PATCH] spi: Add spi-bits-per-word binding. To: Geert Uytterhoeven References: <20170220153512.6563-1-adrian.fiergolski@cern.ch> <20170221190830.xyubgimyc2w5p5v6@sirena.org.uk> <983e943b-30f2-7d80-294a-df29bca11738@cern.ch> <20170313175504.mpwjxqbhc4yxk434@sirena.org.uk> <12c66ecf-8472-c108-d2b4-1d6c3a8e6e74@cern.ch> CC: Mark Brown , linux-spi , Rob Herring , Mark Rutland , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Miguel Ojeda Sandonis" From: Adrian Fiergolski Organization: CERN Message-ID: <5f86da77-c3f9-24e4-6c9a-3e2554bb49d3@cern.ch> Date: Mon, 13 Mar 2017 21:26:04 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [81.28.193.211] X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: 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Hi Geert, On 13.03.2017 at 20:57, Geert Uytterhoeven wrote: > On Mon, Mar 13, 2017 at 7:12 PM, Adrian Fiergolski > wrote: >> On 13.03.2017 at 18:55, Mark Brown wrote: >>>> In my case, xilinx_spi_probe function (of spi-xilinx controller) sets >>>> bits_per_word_mask of spi_master struct only to 16 bits support. Later, >>>> xilinx_spi_probe calls of_register_spi_devices, which calls >>>> of_register_spi_devices. The last one allocates an empty spi_device >>>> struct and configures different options of the spi_device according to a >>>> device tree. bits_per_word are not covered here (why?), thus it is left >>>> 0 (value after allocation), which, by convention, means 8 bits support. >>>> At the end, the same function (of_register_spi_device) calls >>>> spi_add_device which finally calls spi_setup. The last call, according >>>> to convention, changes bits_per_word to 8 and calls >>>> __spi_validate_bits_per_word which fails, as master doesn't support 8 >>>> bit transmission. This fails registration sequence of a device driver. >>>> As you see, the device driver doesn't have possibility to modify >>>> bits_per_word during the registration process, thus it can't provide >>>> support for such limited controllers. >>> I can't see any way in which it follows from the above that it's a good >>> idea to try to override bits per word settings in the device tree, that >>> just wastes user time and is an abstraction failure. We need better >>> handling of defaults done purely in the kernel. >> If enforcing by device tree specific for a given device driver SPI_CPHA, >> SPIC_CPOL, SPI_CS_HIGH, max_speed_hz, etc. if fine form the abstraction >> point of view, why it doesn't apply to bits_per_word ? > Because unlike polarity, phase, and speed, bits_per_word is a property > of the communication protocol. > > E.g. you can talk to the same EEPROM using different polarities, phase, or > speed, but bits_per_word is fixed. In this case, currently, what is the proper way to handle SPI controllers (spi-xilinx) without 8-bit transmission support ?