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Sat, 31 Jan 2026 06:29:13 -0800 (PST) Message-ID: <6067cefb-e016-42b4-8a6d-54e03319b2e4@tuxon.dev> Date: Sat, 31 Jan 2026 16:29:12 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 08/31] clk: at91: clk-master: use clk_parent_data To: ryan.wanner@microchip.com, mturquette@baylibre.com, sboyd@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, bmasney@redhat.com, alexander.sverdlin@gmail.com, varshini.rajendran@microchip.com Cc: cristian.birsan@microchip.com, balamanikandan.gunasundar@microchip.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <548c567b5144e3556aee5e39a9c11ed13167a14a.1768512290.git.ryan.wanner@microchip.com> Content-Language: en-US From: Claudiu Beznea In-Reply-To: <548c567b5144e3556aee5e39a9c11ed13167a14a.1768512290.git.ryan.wanner@microchip.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/16/26 22:07, ryan.wanner@microchip.com wrote: > From: Claudiu Beznea > > Use struct clk_parent_data instead of struct parent_hw as this leads > to less usage of __clk_get_hw() in SoC specific clock drivers and simpler > conversion of existing SoC specific clock drivers from parent_names to > modern clk_parent_data structures. > > __clk_get_hw will be removed in subsequent patches. > > Signed-off-by: Claudiu Beznea > [ryan.wanner@microchip.com: Add clk-master changes to SAM9X75 and > SAMA7D65 SoCs. As well as add md_slck commit message.] > Signed-off-by: Ryan Wanner > --- [ ... ] > @@ -1212,7 +1212,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np) > } > > hw = at91_clk_register_master_div(regmap, "mck0", NULL, > - sama7d65_plls[PLL_ID_CPU][1].hw, > + &AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_CPU][1].hw), > &mck0_layout, &mck0_characteristics, > &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5); > if (IS_ERR(hw)) > @@ -1221,12 +1221,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np) > sama7d65_pmc->chws[PMC_MCK] = hw; > sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw; > > - parent_hws[0] = md_slck_hw; > - parent_hws[1] = td_slck_hw; > - parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN]; > + parent_data[0] = AT91_CLK_PD_NAME("md_slck"); > + parent_data[1] = AT91_CLK_PD_NAME("td_slck"); > + parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]); > for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) { > u8 num_parents = 3 + sama7d65_mckx[i].ep_count; > - struct clk_hw *tmp_parent_hws[8]; > u32 *mux_table; > > mux_table = kmalloc_array(num_parents, sizeof(*mux_table), > @@ -1243,13 +1242,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np) > u8 pll_id = sama7d65_mckx[i].ep[j].pll_id; > u8 pll_compid = sama7d65_mckx[i].ep[j].pll_compid; > > - tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw; > + parent_data[3 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw); > } > - PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws, > - sama7d65_mckx[i].ep_count); Could you please move this to a different patch? Same for sama7g5.c file. The rest LGTM.