Re: [PATCH 03/10] arm64: dts: amlogic: meson-s4: add the PSCI CPU idle state

[neil.armstrong@linaro.org]

On 11/6/26 11:46, christian.koever-draxl@student.uibk.ac.at wrote:
> From: Christian Stefan Kövér-Draxl <ckoever@outlook.de>
> 
> The firmware implements PSCI 1.0 without OS-initiated mode. Add the
> core power-down state the vendor kernel uses (power state 0x10000).
> 
> Signed-off-by: Christian Stefan Kövér-Draxl <ckoever@outlook.de>
> ---
>   arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 24 +++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> index 675db02a8d5e..57270fbfb4a7 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> @@ -22,6 +22,7 @@ cpu0: cpu@0 {
>   			compatible = "arm,cortex-a35";
>   			reg = <0x0 0x0>;
>   			enable-method = "psci";
> +			cpu-idle-states = <&cpu_sleep>;
>   			d-cache-line-size = <64>;
>   			d-cache-size = <0x8000>;
>   			d-cache-sets = <128>;
> @@ -36,6 +37,7 @@ cpu1: cpu@1 {
>   			compatible = "arm,cortex-a35";
>   			reg = <0x0 0x1>;
>   			enable-method = "psci";
> +			cpu-idle-states = <&cpu_sleep>;
>   			d-cache-line-size = <64>;
>   			d-cache-size = <0x8000>;
>   			d-cache-sets = <128>;
> @@ -50,6 +52,7 @@ cpu2: cpu@2 {
>   			compatible = "arm,cortex-a35";
>   			reg = <0x0 0x2>;
>   			enable-method = "psci";
> +			cpu-idle-states = <&cpu_sleep>;
>   			d-cache-line-size = <64>;
>   			d-cache-size = <0x8000>;
>   			d-cache-sets = <128>;
> @@ -64,6 +67,7 @@ cpu3: cpu@3 {
>   			compatible = "arm,cortex-a35";
>   			reg = <0x0 0x3>;
>   			enable-method = "psci";
> +			cpu-idle-states = <&cpu_sleep>;
>   			d-cache-line-size = <64>;
>   			d-cache-size = <0x8000>;
>   			d-cache-sets = <128>;
> @@ -82,6 +86,26 @@ l2: l2-cache0 {
>   			cache-line-size = <64>;
>   			cache-sets = <1024>;
>   		};
> +
> +		/*
> +		 * The firmware reports PSCI 1.0 without OSI, so the platform
> +		 * itself decides how deep to go and the kernel only has this
> +		 * one core state to offer. The suspend parameter is in the
> +		 * original format - bit 16 asks for a power down at affinity
> +		 * level 0 - and matches what the vendor kernel passes.
> +		 */

Drop this comment and move it to the commit message

> +		idle-states {
> +			entry-method = "psci";
> +
> +			cpu_sleep: cpu-sleep {
> +				compatible = "arm,idle-state";
> +				arm,psci-suspend-param = <0x00010000>;
> +				local-timer-stop;
> +				entry-latency-us = <4000>;
> +				exit-latency-us = <5000>;
> +				min-residency-us = <10000>;
> +			};
> +		};
>   	};
>   
>   	timer {

With that:
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil