From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757920AbdJKVQP (ORCPT ); Wed, 11 Oct 2017 17:16:15 -0400 Received: from mail-qt0-f195.google.com ([209.85.216.195]:49909 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752034AbdJKVQK (ORCPT ); Wed, 11 Oct 2017 17:16:10 -0400 X-Google-Smtp-Source: AOwi7QDvznUsh6tQJbbpgSKq9Wj4DmTOKas+yEsf+smI0FQAqqszADRk+13owxelAKX2E7guZtV9kA== From: Len Brown To: peterz@infradead.org Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Len Brown Subject: [PATCH v2] x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping Date: Wed, 11 Oct 2017 17:16:04 -0400 Message-Id: <60f2bbf7cf617e212b522e663f84225bfebc50e5.1507756305.git.len.brown@intel.com> X-Mailer: git-send-email 2.14.0-rc0 Reply-To: Len Brown Organization: Intel Open Source Technology Center Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Len Brown SKX stepping-3 fixed the TSC_DEADLINE issue in a different ucode version number than stepping-4. Linux needs to know this stepping-3 specific version number to also enable the TSC_DEADLINE on stepping-3. The steppings and ucode versions are documented in the SKX BIOS update: https://downloadmirror.intel.com/26978/eng/ReleaseNotes_R00.01.0004.txt Signed-off-by: Len Brown --- wups, clicked send too quick on previous version, which had HSX in the commit message, rather than SKX. Peterz, as this is a patch to your patch, appreciate your ack. thanks, -Len --- arch/x86/kernel/apic/apic.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index d705c769f77d..da13b6abef2c 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -573,11 +573,21 @@ static u32 bdx_deadline_rev(void) return ~0U; } +static u32 skx_deadline_rev(void) +{ + switch (boot_cpu_data.x86_mask) { + case 0x03: return 0x01000136; + case 0x04: return 0x02000014; + } + + return ~0U; +} + static const struct x86_cpu_id deadline_match[] = { DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X, hsx_deadline_rev), DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X, 0x0b000020), DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D, bdx_deadline_rev), - DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_X, 0x02000014), + DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X, skx_deadline_rev), DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_CORE, 0x22), DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_ULT, 0x20), -- 2.14.0-rc0