Re: [PATCH] ppc32/8xx: Fix r3 trashing due to 8MB TLB page instantiation

[Kumar Gala <galak@kernel.crashing.org>]

On Aug 28, 2007, at 6:20 AM, Jochen Friedrich wrote:

> Instantiation of 8MB pages on the TLB cache for the kernel static
> mapping trashes r3 register on !CONFIG_8xx_CPU6 configurations.
> This ensures r3 gets saved and restored.
>
> This has been posted to linuxppc-embedded by Marcelo Tosatti
> <marcelo@kvack.org>, but only an incomplete version of the patch
> has been applied in c51e078f82096a7d35ac8ec2416272e843a0e1c4.
> This patch adds the rest of the fix.
>
> Signed-off-by: Jochen Friedrich <jochen@scram.de>
> ---
>  arch/ppc/kernel/head_8xx.S |    2 --
>  1 files changed, 0 insertions(+), 2 deletions(-)
>
> This can be pulled from git://git.bocc.de/dbox2.git ppc-fixes
> diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
> index 944c35c..eb8d26f 100644
> --- a/arch/ppc/kernel/head_8xx.S
> +++ b/arch/ppc/kernel/head_8xx.S
> @@ -495,9 +495,7 @@ LoadLargeDTLB:
>  	lwz	r11, 4(r0)
>
>  	lwz	r12, 16(r0)
> -#ifdef CONFIG_8xx_CPU6
>  	lwz	r3, 8(r0)
> -#endif
>  	rfi
>
>  /* This is the data TLB error on the MPC8xx.  This could be due to

do we need this in arch/powerpc as well?

- k