From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Huacai Chen <chenhc@lemote.com>
Cc: "open list:MIPS" <linux-mips@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Frank Rowand <frowand.list@gmail.com>,
Paul Burton <paulburton@kernel.org>,
Nathan Chancellor <natechancellor@gmail.com>,
Nick Desaulniers <ndesaulniers@google.com>,
devicetree@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/5] MIPS: Loongson64: Process ISA Node in DeviceTree
Date: Mon, 20 Jul 2020 18:18:51 +0800 [thread overview]
Message-ID: <618053d0-57ea-8675-99ee-2f0b93faa334@flygoat.com> (raw)
In-Reply-To: <CAAhV-H52=2-Hij0AFBGuZWhQ4kWqEwLsvzXPR-ZndQKtkjnMbw@mail.gmail.com>
在 2020/7/20 下午6:01, Huacai Chen 写道:
> Hi, Jiaxun,
>
> On Mon, Jul 20, 2020 at 3:44 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>> Previously, we're hardcoding resserved ISA I/O Space in code, now
>> we're processing reverved I/O via DeviceTree directly. Using the ranges
>> property to determine the size and address of reserved I/O space.
> Maybe it is better to reserve a default legacy io range if there is no
> "isa" node in the .dts file?
As currently all dts is built-in in Kernel, I don't think it's necessary.
Also the only ISA driver remaining that can't be probed by dts is i8042.
We can convert it to DeviceTree based, and then we'll always be safe.
Thanks.
- Jiaxun
>
> Huacai
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>> arch/mips/loongson64/init.c | 85 ++++++++++++++++++++++++++-----------
>> 1 file changed, 60 insertions(+), 25 deletions(-)
>>
>> diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
>> index 59ddadace83f..028d7b324ec2 100644
>> --- a/arch/mips/loongson64/init.c
>> +++ b/arch/mips/loongson64/init.c
>> @@ -7,6 +7,8 @@
>> #include <linux/irqchip.h>
>> #include <linux/logic_pio.h>
>> #include <linux/memblock.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> #include <asm/bootinfo.h>
>> #include <asm/traps.h>
>> #include <asm/smp-ops.h>
>> @@ -63,41 +65,74 @@ void __init prom_free_prom_memory(void)
>> {
>> }
>>
>> -static __init void reserve_pio_range(void)
>> +static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, phys_addr_t addr,
>> + resource_size_t size)
>> {
>> + int ret = 0;
>> struct logic_pio_hwaddr *range;
>> + unsigned long vaddr;
>>
>> range = kzalloc(sizeof(*range), GFP_ATOMIC);
>> if (!range)
>> - return;
>> + return -ENOMEM;
>>
>> - range->fwnode = &of_root->fwnode;
>> - range->size = MMIO_LOWER_RESERVED;
>> - range->hw_start = LOONGSON_PCIIO_BASE;
>> + range->fwnode = fwnode;
>> + range->size = size;
>> + range->hw_start = addr;
>> range->flags = LOGIC_PIO_CPU_MMIO;
>>
>> - if (logic_pio_register_range(range)) {
>> - pr_err("Failed to reserve PIO range for legacy ISA\n");
>> - goto free_range;
>> + ret = logic_pio_register_range(range);
>> + if (ret) {
>> + kfree(range);
>> + return ret;
>> + }
>> +
>> + /* Legacy ISA must placed at the start of PCI_IOBASE */
>> + if (range->io_start != 0) {
>> + logic_pio_unregister_range(range);
>> + kfree(range);
>> + return -EINVAL;
>> }
>>
>> - if (WARN(range->io_start != 0,
>> - "Reserved PIO range does not start from 0\n"))
>> - goto unregister;
>> -
>> - /*
>> - * i8259 would access I/O space, so mapping must be done here.
>> - * Please remove it when all drivers can be managed by logic_pio.
>> - */
>> - ioremap_page_range(PCI_IOBASE, PCI_IOBASE + MMIO_LOWER_RESERVED,
>> - LOONGSON_PCIIO_BASE,
>> - pgprot_device(PAGE_KERNEL));
>> -
>> - return;
>> -unregister:
>> - logic_pio_unregister_range(range);
>> -free_range:
>> - kfree(range);
>> + vaddr = PCI_IOBASE + range->io_start;
>> +
>> + ioremap_page_range(vaddr, vaddr + size, addr, pgprot_device(PAGE_KERNEL));
>> +
>> + return 0;
>> +}
>> +
>> +static __init void reserve_pio_range(void)
>> +{
>> + struct device_node *np;
>> +
>> + for_each_node_by_name(np, "isa") {
>> + struct of_pci_range range;
>> + struct of_pci_range_parser parser;
>> +
>> + pr_info("ISA Bridge: %pOF\n", np);
>> +
>> + if (of_pci_range_parser_init(&parser, np)) {
>> + pr_info("Failed to parse resources.\n");
>> + break;
>> + }
>> +
>> + for_each_of_pci_range(&parser, &range) {
>> + switch (range.flags & IORESOURCE_TYPE_BITS) {
>> + case IORESOURCE_IO:
>> + pr_info(" IO 0x%016llx..0x%016llx\n",
>> + range.cpu_addr,
>> + range.cpu_addr + range.size - 1);
>> + if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size))
>> + pr_warn("Failed to reserve legacy IO in Logic PIO\n");
>> + break;
>> + case IORESOURCE_MEM:
>> + pr_info(" MEM 0x%016llx..0x%016llx\n",
>> + range.cpu_addr,
>> + range.cpu_addr + range.size - 1);
>> + break;
>> + }
>> + }
>> + }
>> }
>>
>> void __init arch_init_irq(void)
>> --
>> 2.28.0.rc1
>>
next prev parent reply other threads:[~2020-07-20 10:19 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-20 7:42 [PATCH 0/5] " Jiaxun Yang
2020-07-20 7:42 ` [PATCH 1/5] of_address: Add bus type match for pci ranges parser Jiaxun Yang
2020-07-21 0:21 ` Rob Herring
2020-07-20 7:42 ` [PATCH 2/5] MIPS: Loongson64: Process ISA Node in DeviceTree Jiaxun Yang
2020-07-20 10:01 ` Huacai Chen
2020-07-20 10:18 ` Jiaxun Yang [this message]
2020-07-20 11:44 ` Huacai Chen
2020-07-20 11:58 ` Jiaxun Yang
2020-07-21 0:27 ` Rob Herring
2020-07-20 7:42 ` [PATCH 3/5] MIPS: Loongson64: Enlarge IO_SPACE_LIMIT Jiaxun Yang
2020-07-20 10:03 ` Huacai Chen
2020-07-20 10:45 ` Arnd Bergmann
2020-07-20 12:04 ` Jiaxun Yang
2020-07-20 12:20 ` Arnd Bergmann
2020-07-20 7:42 ` [PATCH 4/5] MIPS: Loongson64: DTS: Fix ISA range for RS780E PCH Jiaxun Yang
2020-07-20 7:42 ` [PATCH 5/5] MIPS: Loongson64: Add ISA node for LS7A PCH Jiaxun Yang
2020-07-20 10:04 ` Huacai Chen
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