From: Shuai Xue <xueshuai@linux.alibaba.com>
To: Lukas Wunner <lukas@wunner.de>, Bjorn Helgaas <helgaas@kernel.org>
Cc: rostedt@goodmis.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
linux-trace-kernel@vger.kernel.org,
ilpo.jarvinen@linux.intel.com, mattc@purestorage.com,
Jonathan.Cameron@huawei.com, bhelgaas@google.com,
tony.luck@intel.com, bp@alien8.de, mhiramat@kernel.org,
mathieu.desnoyers@efficios.com, oleg@redhat.com,
naveen@kernel.org, davem@davemloft.net,
anil.s.keshavamurthy@intel.com, mark.rutland@arm.com,
peterz@infradead.org, tianruidong@linux.alibaba.com
Subject: Re: [PATCH v9 2/2] PCI: trace: Add a RAS tracepoint to monitor link speed changes
Date: Mon, 28 Jul 2025 17:28:28 +0800 [thread overview]
Message-ID: <61ec82be-a081-4b32-aa4a-a3ad6e564d23@linux.alibaba.com> (raw)
In-Reply-To: <aISJHjFrHkxVNFzJ@wunner.de>
在 2025/7/26 15:51, Lukas Wunner 写道:
> On Fri, Jul 25, 2025 at 04:09:21PM -0500, Bjorn Helgaas wrote:
>>> @@ -319,8 +319,7 @@ int pciehp_check_link_status(struct controller *ctrl)
>>> return -1;
>>> }
>>>
>>> - pcie_capability_read_word(pdev, PCI_EXP_LNKSTA2, &linksta2);
>>> - __pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status, linksta2);
>>> + pcie_update_link_speed(ctrl->pcie->port->subordinate, PCIE_HOTPLUG);
>>
>> It kind of bugs me that the hot-add flow reads LNKSTA three times and
>> generates both pci_hp_event LINK_UP and link_event tracepoints:
>>
>> pciehp_handle_presence_or_link_change
>> link_active = pciehp_check_link_active()
>> pcie_capability_read_word(PCI_EXP_LNKSTA)
>> if (link_active)
>> ctrl_info(ctrl, "Slot(%s): Link Up\n")
>
> This LNKSTA read decides whether to bring up the slot.
> It can't be eliminated.
>
>> trace_pci_hp_event(PCI_HOTPLUG_LINK_UP)
>> pciehp_enable_slot
>> __pciehp_enable_slot
>> board_added
>> pciehp_check_link_status
>> pcie_capability_read_word(PCI_EXP_LNKSTA)
>
> This is sort of a final check whether the link is (still) active
> before commencing device enumeration. Doesn't look like it can
> safely be eliminated either.
>
>> pcie_update_link_speed
>> pcie_capability_read_word(PCI_EXP_LNKSTA)
>> pcie_capability_read_word(PCI_EXP_LNKSTA2)
>> trace_pcie_link_event(<REASON>)
>
> This third register read is introduced by the present patch and is
> indeed somewhat a step back, given that pciehp_check_link_status()
> currently deliberately calls __pcie_update_link_speed() to pass
> the already read LNKSTA value.
Hi Lukas, and Bjorn:
Thanks for the excellent technical analysis!
You're absolutely right. I introduced an unnecessary regression by
adding a third LNKSTA read when pciehp_check_link_status() already has
the LNKSTA value and was specifically designed to pass it to
__pcie_update_link_speed().
>
> I'm wondering if the tracepoint can be moved down to
> __pcie_update_link_speed()?
Yes, that's a much better approach. Will fix it in next version.
>
>> And maybe we need both a bare LINK_UP event and a link_event with all
>> the details, but again it seems a little weird to me that there are
>> two tracepoints when there's really only one event and we know all the
>> link_event information from the very first LNKSTA read.
>
> One of the reasons is that a "Link Down" event would have to
> contain dummy values for link speed etc, so it seemed cleaner
> to separate the hotplug event from the link speed event.
>
> Thanks,
>
> Lukas
I agree with Lukas and I completely agree with this separation. The two
tracepoints serve different purposes:
- pci_hp_event: Pure hotplug state changes (LINK_UP/LINK_DOWN,
CARD_PRESENT/CARD_NOT_PRESENT)
- pcie_link_event: Actual link parameter information when meaningful
values exist
For LINK_DOWN events, we don't have meaningful speed/width values, so
forcing them into a single tracepoint would indeed require dummy/invalid
values, making the interface confusing.
Thanks for the clear technical guidance and for catching my regression!
Best regards,
Shuai
next prev parent reply other threads:[~2025-07-28 9:28 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-23 3:31 [PATCH v9 0/2] add PCI hotplug and PCIe link tracepoint Shuai Xue
2025-07-23 3:31 ` [PATCH v9 1/2] PCI: trace: Add a generic RAS tracepoint for hotplug event Shuai Xue
2025-07-25 21:09 ` Bjorn Helgaas
2025-07-28 9:05 ` Shuai Xue
2025-07-23 3:31 ` [PATCH v9 2/2] PCI: trace: Add a RAS tracepoint to monitor link speed changes Shuai Xue
2025-07-23 14:05 ` Steven Rostedt
2025-07-25 2:11 ` Shuai Xue
2025-07-25 2:25 ` Steven Rostedt
2025-07-25 2:59 ` Shuai Xue
2025-07-25 3:06 ` Steven Rostedt
2025-07-25 3:15 ` Shuai Xue
2025-07-23 19:30 ` kernel test robot
2025-07-24 14:06 ` Steven Rostedt
2025-07-25 2:31 ` Shuai Xue
2025-07-25 2:57 ` Steven Rostedt
2025-07-25 3:18 ` Shuai Xue
2025-07-25 21:09 ` Bjorn Helgaas
2025-07-26 7:51 ` Lukas Wunner
2025-07-28 9:28 ` Shuai Xue [this message]
2025-07-28 9:17 ` Shuai Xue
2025-09-18 23:06 ` [PATCH v9 0/2] add PCI hotplug and PCIe link tracepoint Bjorn Helgaas
2025-09-19 1:40 ` Shuai Xue
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