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Wed, 29 Apr 2026 04:16:07 -0700 (PDT) X-Received: by 2002:a17:90b:4a10:b0:35e:58d3:329f with SMTP id 98e67ed59e1d1-364920a5a75mr7888676a91.13.1777461366535; Wed, 29 Apr 2026 04:16:06 -0700 (PDT) Received: from [10.217.216.225] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-364a0303f52sm3481185a91.16.2026.04.29.04.16.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Apr 2026 04:16:06 -0700 (PDT) Message-ID: <6213ff0f-b904-4d52-890d-69d453c3db18@oss.qualcomm.com> Date: Wed, 29 Apr 2026 16:46:00 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] clk: qcom: Add Global clock controller support on Qualcomm Shikra SoC To: Imran Shaik , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran Cc: Ajit Pandey , Jagadeesh Kona , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org References: <20260429-shikra-gcc-rpmcc-clks-v1-0-c3cd77558b7a@oss.qualcomm.com> <20260429-shikra-gcc-rpmcc-clks-v1-4-c3cd77558b7a@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: <20260429-shikra-gcc-rpmcc-clks-v1-4-c3cd77558b7a@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: _f7q96DNVxNlBRcWUaONGRxHbrKr_dlv X-Proofpoint-ORIG-GUID: _f7q96DNVxNlBRcWUaONGRxHbrKr_dlv X-Authority-Analysis: v=2.4 cv=aPPAb79m c=1 sm=1 tr=0 ts=69f1e877 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=qXpo7wsCot1G_wR8kq4A:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI5MDExNCBTYWx0ZWRfX2ooObSdeNWaX 9JUwRwU7E8ORSxBtZTF0FBl1mY8Xqfcob8qL/+sTJy2kPkxSoKxCUi0Hu03CDsnwD65Nz15swTd yIWlbRmRJYHmLfC1tQChZ4rC6JaXXCT4EQ3/qGRxSrwbaaVqETIDAN87nbfuxEObLUuD0s+1YTC d7uEzEAO2dNRn+ASemMpEOFKFD4diHrEAONsNoIvuhHeIt1fiUUmXOyQczGA0LxkdfGybaVSKRb pRsI9UggOPZWNxt+4Ug3VTMuKjNLf5xJ1XnOf5gB4L3eHIRH4Wd06T8RdsGlM4uXZ7Bz1bcoROf msk1qsKQCAn8H5mBHKQgUPudwOqVlZkWKdSyspaH175QCCCDt/8s4o4TdQlvKbdAbH0wXsNl+RV Zc5vmSgEq7Wz0ZjBQ6zYXNjwViAQmEbEOz05b8YCA+YI64sugem7rykTKYnL41DWacOzgzGmUAv bnLd/weMcEm9zrS3QDQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 priorityscore=1501 adultscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604290114 On 4/29/2026 4:21 PM, Imran Shaik wrote: > Add support for Global clock controller (GCC) on Qualcomm Shikra SoC. > > Signed-off-by: Imran Shaik > --- > drivers/clk/qcom/Kconfig | 9 + > drivers/clk/qcom/Makefile | 1 + > drivers/clk/qcom/gcc-shikra.c | 4428 +++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 4438 insertions(+) > > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig > index df21ef5ffd6862bec26e3a77ace62ad935ef44fb..a2c7751b091a482f22baa633d658cad0e52139fa 100644 > --- a/drivers/clk/qcom/Kconfig > +++ b/drivers/clk/qcom/Kconfig > @@ -155,6 +155,15 @@ config CLK_NORD_GCC > SPI, I2C, USB, SD/UFS, PCIe etc. The clock controller is a combination > of GCC, SE_GCC, NE_GCC and NW_GCC. Reviewed-by: Taniya Das -- Thanks, Taniya Das