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(2001-14bb-ce-6a0b-b501-c51a-e775-2fe5.rev.dnainternet.fi. [2001:14bb:ce:6a0b:b501:c51a:e775:2fe5]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-31090822c3asm19762901fa.65.2025.04.23.08.23.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Apr 2025 08:23:46 -0700 (PDT) Message-ID: <6233171a-2964-4d57-986c-d3f1725eacd6@oss.qualcomm.com> Date: Wed, 23 Apr 2025 18:23:44 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] drm/msm/a6xx: Get HBB dynamically, if available To: Rob Clark , Konrad Dybcio Cc: Akhil P Oommen , Connor Abbott , Konrad Dybcio , Bjorn Andersson , Kees Cook , "Gustavo A. R. Silva" , Sean Paul , Abhinav Kumar , David Airlie , Simona Vetter , Dmitry Baryshkov , Marijn Suijten , linux-kernel , linux-arm-msm , linux-hardening@vger.kernel.org, dri-devel , freedreno@lists.freedesktop.org References: <20250410-topic-smem_dramc-v2-0-dead15264714@oss.qualcomm.com> <20250410-topic-smem_dramc-v2-3-dead15264714@oss.qualcomm.com> <20911703-ab4e-4eb2-8611-294730a06d2f@quicinc.com> <1282bf58-e431-4a07-97e5-628437e7ce5f@quicinc.com> <16845de2-a40a-4e3d-b3aa-c91e7072b57f@quicinc.com> Content-Language: en-US From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: XiDFi-7qTNafnbWGBc3WxXcMueAqc_JU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDIzMDEwOCBTYWx0ZWRfX9kBmw3O1bgnW 6u+XnGTzmpkxS8RaZ+iLEfajH0Zi0ezO4Hp1QsflfIrIzN2h/rcRDw0/OuVC1GG612v+px/8ds0 S+BBlIi0pazhT7zTRtL/9+XgA7NhKRq7iJPD5FcHJ+wGBOZ1fbKFSLik+UxRHqlv/vRQzEwtyCn W0C2Vf+VojVYlFYb3xL+qkTi1twy29N0YaFkJv7AQiAq2AQKmVhcaVamrIRAFMxgS23uaEZhMwL o1Uc4kJDe0kbp1S3fKFrzNgTBFtdGERjz7wQuiFz52CUzJVPg4hCVxnhMNp2q9ZZpIssA+53D7D DxPugxzsMNFEplJeCb7Q6yU1Q4gKH4OLZcC9hlyC+XWwgI7n+UZjZebzAGunxK8PMHqcAz02YC2 +bOfcJ9tB5eLv1mPGIz8iApZi6U/Y0ebKcFfA6Mrq2//KJ9vJ38QfcFrzPKV0fqmSlrks03W X-Authority-Analysis: v=2.4 cv=ELgG00ZC c=1 sm=1 tr=0 ts=68090604 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=INHOtyMNgn4pQtdJY3IA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: XiDFi-7qTNafnbWGBc3WxXcMueAqc_JU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.680,FMLib:17.12.80.40 definitions=2025-04-23_09,2025-04-22_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 malwarescore=0 clxscore=1015 bulkscore=0 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504230108 On 23/04/2025 17:55, Rob Clark wrote: > On Tue, Apr 22, 2025 at 4:57 PM Konrad Dybcio > wrote: >> >> On 4/21/25 10:13 PM, Rob Clark wrote: >>> On Fri, Apr 18, 2025 at 9:00 AM Akhil P Oommen wrote: >>>> >>>> On 4/18/2025 6:40 AM, Connor Abbott wrote: >>>>> On Thu, Apr 17, 2025, 1:50 PM Akhil P Oommen wrote: >>>>>> >>>>>> On 4/17/2025 9:02 PM, Connor Abbott wrote: >>>>>>> On Thu, Apr 17, 2025 at 3:45 AM Akhil P Oommen wrote: >>>>>>>> >>>>>>>> On 4/10/2025 11:13 PM, Konrad Dybcio wrote: >>>>>>>>> From: Konrad Dybcio >>>>>>>>> >>>>>>>>> The Highest Bank address Bit value can change based on memory type used. >>>>>>>>> >>>>>>>>> Attempt to retrieve it dynamically, and fall back to a reasonable >>>>>>>>> default (the one used prior to this change) on error. >>>>>>>>> >>>>>>>>> Signed-off-by: Konrad Dybcio >>>>>>>>> --- >>>>>>>>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 ++++++++++++++- >>>>>>>>> 1 file changed, 14 insertions(+), 1 deletion(-) >>>>>>>>> >>>>>>>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>>>>>>> index 06465bc2d0b4b128cddfcfcaf1fe4252632b6777..a6232b382bd16319f20ae5f8f5e57f38ecc62d9f 100644 >>>>>>>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>>>>>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>>>>>>> @@ -13,6 +13,7 @@ >>>>>>>>> #include >>>>>>>>> #include >>>>>>>>> #include >>>>>>>>> +#include >>>>>>>>> >>>>>>>>> #define GPU_PAS_ID 13 >>>>>>>>> >>>>>>>>> @@ -587,6 +588,8 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu) >>>>>>>>> >>>>>>>>> static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) >>>>>>>>> { >>>>>>>>> + int hbb; >>>>>>>>> + >>>>>>>>> gpu->ubwc_config.rgb565_predicator = 0; >>>>>>>>> gpu->ubwc_config.uavflagprd_inv = 0; >>>>>>>>> gpu->ubwc_config.min_acc_len = 0; >>>>>>>>> @@ -635,7 +638,6 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) >>>>>>>>> adreno_is_a690(gpu) || >>>>>>>>> adreno_is_a730(gpu) || >>>>>>>>> adreno_is_a740_family(gpu)) { >>>>>>>>> - /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */ >>>>>>>>> gpu->ubwc_config.highest_bank_bit = 16; >>>>>>>>> gpu->ubwc_config.amsbc = 1; >>>>>>>>> gpu->ubwc_config.rgb565_predicator = 1; >>>>>>>>> @@ -664,6 +666,13 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) >>>>>>>>> gpu->ubwc_config.highest_bank_bit = 14; >>>>>>>>> gpu->ubwc_config.min_acc_len = 1; >>>>>>>>> } >>>>>>>>> + >>>>>>>>> + /* Attempt to retrieve the data from SMEM, keep the above defaults in case of error */ >>>>>>>>> + hbb = qcom_smem_dram_get_hbb(); >>>>>>>>> + if (hbb < 0) >>>>>>>>> + return; >>>>>>>>> + >>>>>>>>> + gpu->ubwc_config.highest_bank_bit = hbb; >>>>>>>> >>>>>>>> I am worried about blindly relying on SMEM data directly for HBB for >>>>>>>> legacy chipsets. There is no guarantee it is accurate on every chipset >>>>>>>> and every version of firmware. Also, until recently, this value was >>>>>>>> hardcoded in Mesa which matched the value in KMD. >>>>>>> >>>>>>> To be clear about this, from the moment we introduced host image >>>>>>> copies in Mesa we added support for querying the HBB from the kernel, >>>>>>> explicitly so that we could do what this series does without Mesa ever >>>>>>> breaking. Mesa will never assume the HBB unless the kernel is too old >>>>>>> to support querying it. So don't let Mesa be the thing that stops us >>>>>>> here. >>>>>> >>>>>> Thanks for clarifying about Mesa. I still don't trust a data source that >>>>>> is unused in production. >>>>> >>>>> Fair enough, I'm not going to argue with that part. Just wanted to >>>>> clear up any confusion about Mesa. >>>>> >>>>> Although, IIRC kgsl did set different values for a650 depending on >>>>> memory type... do you know what source that used? >>>> >>>> KGSL relies on an undocumented devicetree node populated by bootloader >>>> to detect ddrtype and calculates the HBB value based on that. >>> >>> Would it be reasonable to use the smem value, but if we find the >>> undocumented dt property, WARN_ON() if it's value disagrees with smem? >>> >>> That would at least give some confidence, or justified un-confidence >>> about the smem values >> >> The aforementioned value is populated based on the data that this >> driver reads out, and only on the same range of platforms that this >> driver happens to cater to > > Did I understand that correctly to mean that the dt property is based > on the same smem value that you are using? In that case, there should > be no argument against using the smem value as the source of truth. It is, but is done by the bootloader that knows exact format of the data. -- With best wishes Dmitry