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([2405:201:c409:b03f:1dee:4ab6:7c98:fcd7]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82379c21112sm17072133b3a.54.2026.02.02.20.37.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Feb 2026 20:37:25 -0800 (PST) Message-ID: <62860c39-18cc-4db7-89ab-f85a39e67974@oss.qualcomm.com> Date: Tue, 3 Feb 2026 10:07:22 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/2] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add TC9563 PCIe switch nodes To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260203-industrial-mezzanine-pcie-v2-0-8579ed6bf931@oss.qualcomm.com> Content-Language: en-US From: Sushrut Shree Trivedi In-Reply-To: <20260203-industrial-mezzanine-pcie-v2-0-8579ed6bf931@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=XP89iAhE c=1 sm=1 tr=0 ts=69817b87 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=sYISKGJa3KB_DH2wkrwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: mGtJm8Xy1euzOi5mdLDHGNKCUytSSeQ8 X-Proofpoint-ORIG-GUID: mGtJm8Xy1euzOi5mdLDHGNKCUytSSeQ8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAzMDAzNCBTYWx0ZWRfX6eR96K8OAPtL KRhm8gHsmGzORC0VyqUCxsHBGWZd0EgzamhQQUmF8Di7+sBhcnuBxkpGjo6OgNcPYxBlqeSB1FD g6fREF3o9AGk10GFkxbUcRi1/9w+96qqjWixGMt4nN00txXcJKjng6o0oxWFj6pp+W7kVUjelk3 0KNhzkNEyaxoIB8kIWcBFMon10QN7WF92Ikz/GAtMRXr3J6M/CY0iJ3sR0SchX6+BmciK5JR2bt frF0Z0Ge1HhKsOxiajZpWdnTZxQirvl9ila3Z5MnnwszSORe+ofVSl+CfZwyBu3h6pFbvDyglrz E+jxDL8PkzbchZlbQIoW2LjAWEZZUYnOthcFCTLPDSWBuLrw6hHTAh/9QVoVpTiBeDq5YheNSuN qnJuPeMU6OM+yXTl9pv7KKZuv5ogLIvQ1ZUBoeDMZVj6kpijcpHNmd9ZCM1YMGv5vfGTkskhacX SC2N/hA8O5fvDMAXkUA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-03_01,2026-02-02_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 adultscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 spamscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602030034 Hi, Apologies for the error, this is v1 series. Thanks On 2/3/2026 10:01 AM, Sushrut Shree Trivedi wrote: > Add nodes for the two additional TC9563 PCIe switches present on the > QCOM RB3Gen2 Industrial Mezzanine platform. > > One of the TC9563 is connected directly to the PCIe0 root-port while > the second TC9563 switch is connected in cascade fashion to another > already available TC9563 switch on PCIe1 via the former's downstream > port (DSP). The final PCIe hierarchy on the Industrial Mezz platform > would look something like below: > > ┌────────────────────────────┐ > │ │ > │ │ > │ │ > │ SoC │ > │ │ > │ PCIe0 PCIe1 │ > │ ┌───┐ ┌───┐ │ > └────└─┬─┘───────────└─┬─┘───┘ > │ │ > │ │ > │ │ > ┌────────────────┘ └────────────────┐ > │ │ > │ │ > │ │ > ┌────────┴─────────┐ ┌──────────┴───────┐ > │ USP │ │ USP │ > │ │ │ │ > │ TC9563 │ │ TC9563 │ > │ │ │ │ > │ │ │ │ > │ DSP1 DSP2 DSP3 │ │ DSP1 DSP2 DSP3 │ > └──┬──────┬─────┬──┘ └───┬─────┬─────┬──┘ > │ │ │ │ │ │ > │ │ │ │ │ │ > │ │ │ │ │ │ > │ │ │ │ EP ETHERNET > │ │ │ │ > │ │ │ └──────┐ > EP EP ETHERNET │ > │ > │ > ┌─────────┴────────┐ > │ USP │ > │ │ > │ TC9563 │ > │ │ > │ │ > │ DSP1 DSP2 DSP3 │ > └──┬──────┬─────┬──┘ > │ │ │ > │ │ │ > │ │ │ > │ │ │ > │ │ │ > EP EP ETHERNET > > > > Signed-off-by: Sushrut Shree Trivedi > --- > Changes in v2: > - EDITME: describe what is new in this series revision. > - EDITME: use bulletpoints and terse descriptions. > - Link to v1: https://lore.kernel.org/r/20260131-industrial-mezzanine-pcie-v1-0-b3c2905dd768@oss.qualcomm.com > > --- > Sushrut Shree Trivedi (2): > arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add TC9563 PCIe switch node for PCIe0 > arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add second TC9563 PCIe switch node for PCIe1 > > .../qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso | 234 +++++++++++++++++++++ > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 12 +- > 2 files changed, 240 insertions(+), 6 deletions(-) > --- > base-commit: 4f938c7d3b25d87b356af4106c2682caf8c835a2 > change-id: 20260131-industrial-mezzanine-pcie-75dd851f5b04 > > Best regards,