From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4B6D4AF69B for ; Thu, 3 Sep 2026 16:57:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788454638; cv=none; b=KPnc4+juMGcjO+V9InasWax2ucBk+0eg3QsRlL5r5sokExEo8rG6c6+1mNLaUzozF6gqQvNFg/8dHLZKEJctq7CIyxhI5KtyfUjzVefWVtXO1EWiDlA1cac+CU4z9aeqF4zXb+HnzMWEUMjgNpCJ3+mZcTRnMsl2vK3bTyhpkfE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788454638; c=relaxed/simple; bh=i/k81EGLNxtO/O0oHsEnMXbYVmh6+JDKRa9c1Dfk3EI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ea+7CjS80IBiXu7B+oVAxPcfkXjMzdqJlacKFaxJPorRSYffAX6Rlvab5J2h6QJXf/wEbhv6ep9Oqh+SAUkfulGatHbBP6ih5te9PVV/n9q2KOThtf+EYWEBQCiwsvFg6ZzIe077MegpkcE5+VEZz4xihNQu780VQmCsnkcfFWA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IJxMhosF; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IJxMhosF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1788454635; x=1819990635; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i/k81EGLNxtO/O0oHsEnMXbYVmh6+JDKRa9c1Dfk3EI=; b=IJxMhosFb2d1H/W2p1J9kM8VABgnxfjVRVAR7R8EnPpLmSthhSyIrwcr m81WSi5YGwDcDA4ArRWIdqXk6FxIubYZB+eTd5J3D4mjQRG4Vmli4Ch2U IsIQV4c9q90hnsk8dUYCNlKsCkQVZq7N5fM6DAiCXPBnUMqWv1G25/qzM btzga5iz4jm+O8AjT2G8lQXxDZaMCyirfldKJKgpOIFCQq84lU8cXVgPS jxmzamsrAtb2sXAi3SHHnPEFV6OeXmO5Lf/teqlZO7ACJ6NUixMLnG8Kc UdEy3gPgBudr7TGweaUGW14E9Mdw7qSkNX9cyBBCNskbx5Vp8Lncy+Y76 w==; X-CSE-ConnectionGUID: c1GGGc41S363MKajUzFdgg== X-CSE-MsgGUID: iYp7EdigTtyggx+PJZQ1gA== X-IronPort-AV: E=McAfee;i="6800,10657,11895"; a="100103979" X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="100103979" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2026 09:57:14 -0700 X-CSE-ConnectionGUID: ihv8a+w1RBqJ1bNQn23tpw== X-CSE-MsgGUID: LK2sMfroTr28fBi1+gfeQQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="273554217" Received: from rchatre-desk1.jf.intel.com ([10.165.154.99]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2026 09:57:13 -0700 From: Reinette Chatre To: tony.luck@intel.com, ben.horgan@arm.com, james.morse@arm.com, Dave.Martin@arm.com, babu.moger@amd.com, bp@alien8.de, tglx@linutronix.de, dave.hansen@linux.intel.com Cc: x86@kernel.org, hpa@zytor.com, fustini@kernel.org, fenghuay@nvidia.com, peternewman@google.com, yu.c.chen@intel.com, linux-kernel@vger.kernel.org, patches@lists.linux.dev, reinette.chatre@intel.com Subject: [PATCH 2/5] x86,fs/resctrl: Remove "arch_needs_linear" Date: Thu, 3 Sep 2026 09:57:04 -0700 Message-ID: <62904217290f2cd3225d8608c19e284d6dde3aec.1788452481.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit arch_needs_linear is used to reject any configuration attempt on a non-linear Intel MBA resource yet there are no Intel SKUs that support non-linear delay. If such non-existent non-linear Intel MBA resource is encountered during enumeration then it will not be marked as alloc_capable anyway and thus resctrl will never attempt configuration because of it not being capable of allocation, not because of the arch_needs_linear value. On Intel the MBA resource will thus always have: delay_linear == true and arch_needs_linear == true On AMD the MBA resource will always have: delay_linear == false and arch_needs_linear == false MPAM does not set arch_needs_linear. rdt_get_mb_table() is only called during enumeration and since it always returns false an Intel MBA resource without MBA_IS_LINEAR is not supported. Drop the unnecessary venture to rdt_get_mb_table() to make it clear that an Intel MBA resource without MBA_IS_LINEAR is not considered capable of allocation. Drop the dead code that sets arch_needs_linear to false on Intel. Since "if (!delay_linear && arch_needs_linear)" can never be true, drop arch_needs_linear and its only usage during bandwidth validation. Signed-off-by: Reinette Chatre --- Changes since RFC v1: - Fix typo in changelog Changes since RFC v2: - Rework changelog. - Group all r->membw assignments together. --- arch/x86/kernel/cpu/resctrl/core.c | 39 ++++++------------------------ fs/resctrl/ctrlmondata.c | 8 ------ include/linux/resctrl.h | 2 -- 3 files changed, 7 insertions(+), 42 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 65cfde0d6a9b..0e34a1c541b9 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -181,27 +181,6 @@ static inline void cache_alloc_hsw_probe(void) rdt_alloc_capable = true; } -/* - * rdt_get_mb_table() - get a mapping of bandwidth(b/w) percentage values - * exposed to user interface and the h/w understandable delay values. - * - * The non-linear delay values have the granularity of power of two - * and also the h/w does not guarantee a curve for configured delay - * values vs. actual b/w enforced. - * Hence we need a mapping that is pre calibrated so the user can - * express the memory b/w as a percentage value. - */ -static inline bool rdt_get_mb_table(struct rdt_resource *r) -{ - /* - * There are no Intel SKUs as of now to support non-linear delay. - */ - pr_info("MBA b/w map not implemented for cpu:%d, model:%d", - boot_cpu_data.x86, boot_cpu_data.x86_model); - - return false; -} - static __init bool __get_mem_config_intel(struct rdt_resource *r) { struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); @@ -213,16 +192,13 @@ static __init bool __get_mem_config_intel(struct rdt_resource *r) hw_res->num_closid = edx.split.cos_max + 1; max_delay = eax.split.max_delay + 1; r->membw.max_bw = MAX_MBA_BW; - r->membw.arch_needs_linear = true; - if (ecx & MBA_IS_LINEAR) { - r->membw.delay_linear = true; - r->membw.min_bw = MAX_MBA_BW - max_delay; - r->membw.bw_gran = MAX_MBA_BW - max_delay; - } else { - if (!rdt_get_mb_table(r)) - return false; - r->membw.arch_needs_linear = false; - } + + if (!(ecx & MBA_IS_LINEAR)) + return false; + + r->membw.delay_linear = true; + r->membw.min_bw = MAX_MBA_BW - max_delay; + r->membw.bw_gran = MAX_MBA_BW - max_delay; if (boot_cpu_has(X86_FEATURE_PER_THREAD_MBA)) r->membw.throttle_mode = THREAD_THROTTLE_PER_THREAD; @@ -255,7 +231,6 @@ static __init bool __rdt_get_mem_config_amd(struct rdt_resource *r) /* AMD does not use delay */ r->membw.delay_linear = false; - r->membw.arch_needs_linear = false; /* * AMD does not use memory delay throttle model to control diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index cafebdff70dc..4562072b8ba6 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -45,14 +45,6 @@ static bool bw_validate(char *buf, u32 *data, struct rdt_resource *r) int ret; u32 bw; - /* - * Only linear delay values is supported for current Intel SKUs. - */ - if (!r->membw.delay_linear && r->membw.arch_needs_linear) { - rdt_last_cmd_puts("No support for non-linear MB domains\n"); - return false; - } - ret = kstrtou32(buf, 10, &bw); if (ret) { rdt_last_cmd_printf("Invalid MB value %s\n", buf); diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index b63dc62690ca..66dc9813c888 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -249,7 +249,6 @@ enum membw_throttle_mode { * @max_bw: Maximum memory bandwidth value, used as the reset value * @bw_gran: Granularity at which the memory bandwidth is allocated * @delay_linear: True if memory B/W delay is in linear scale - * @arch_needs_linear: True if we can't configure non-linear resources * @throttle_mode: Bandwidth throttling mode when threads request * different memory bandwidths * @mba_sc: True if MBA software controller(mba_sc) is enabled @@ -259,7 +258,6 @@ struct resctrl_membw { u32 max_bw; u32 bw_gran; u32 delay_linear; - bool arch_needs_linear; enum membw_throttle_mode throttle_mode; bool mba_sc; }; -- 2.55.0