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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6541209cadfsm1972784a12.34.2026.01.15.01.12.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Jan 2026 01:12:18 -0800 (PST) Message-ID: <63065e3d-70bf-4178-bd92-04c6ba1a1340@oss.qualcomm.com> Date: Thu, 15 Jan 2026 10:12:16 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/8] drm/msm/dp: fix HPD state status bit shift value To: Dmitry Baryshkov , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Kuogee Hsieh Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jessica Zhang References: <20260115-hpd-refactor-v3-0-08e2f3bcd2e0@oss.qualcomm.com> <20260115-hpd-refactor-v3-1-08e2f3bcd2e0@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260115-hpd-refactor-v3-1-08e2f3bcd2e0@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 26ZDaHa6adNZZa2gEjLcfVD_nw4ZF5dv X-Proofpoint-ORIG-GUID: 26ZDaHa6adNZZa2gEjLcfVD_nw4ZF5dv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTE1MDA2NCBTYWx0ZWRfX8cUNHHaKSRUu 1hrjK4agzgkckKU34SShRTkwenyiBebYi9LfCKWu5DZx9X39ZVdYtxXyGUVpAL/ezjeT34fG4tu fSLwd3CtssCnxhDgdZPIKctUCtuZ7GCDIeHNDohRxSaH+AdnJr6AEkO0Q3c7szaFmFf84nAx/5h NF9K4gcQrwyoOs/8KOa5NNg+ebReChbcWZKgYtIHSdT8vnsgr2rc222sm1IM0tDMIG4T/oI+EBi ILMQWDlmuFK7Y/PwpkznrlH/Ua4StqBLcDv/2u1sakRNMpzub+fktLCFQ1i2DfUs/KiXsF2/VF4 GIihF2fdgKTp+Mm27mECNUTuYoYZOFzP+BbO7hqZbsSm19VyBCHwB7EFKtFXWZVwPRqVB1MZayj qQBuewMTFlHqY1yVnN8QE3Wh36xiMbPuLHs3IKcOLNQkrbk80WswTQgdxU4I1/XU0/7Ayszhvg6 wRftrU21we3UUgZeP9w== X-Authority-Analysis: v=2.4 cv=fsHRpV4f c=1 sm=1 tr=0 ts=6968af74 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=tINfiVESruKu4bDgj1EA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-15_02,2026-01-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 bulkscore=0 adultscore=0 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601150064 On 1/15/26 8:29 AM, Dmitry Baryshkov wrote: > From: Jessica Zhang > > The HPD state status is the 3 most significant bits, not 4 bits of the > HPD_INT_STATUS register. /me stares BIT(28) is indeed not defined, at least on Hamoa.. Amazing luck things worked.. > > Fix the bit shift macro so that the correct bits are returned in > msm_dp_aux_is_link_connected(). > > Fixes: 19e52bcb27c2 ("drm/msm/dp: return correct connection status after suspend") > Signed-off-by: Jessica Zhang > Signed-off-by: Dmitry Baryshkov > --- > drivers/gpu/drm/msm/dp/dp_reg.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h > index 7c44d4e2cf13..3689642b7fc0 100644 > --- a/drivers/gpu/drm/msm/dp/dp_reg.h > +++ b/drivers/gpu/drm/msm/dp/dp_reg.h > @@ -68,8 +68,8 @@ > #define DP_DP_IRQ_HPD_INT_ACK (0x00000002) > #define DP_DP_HPD_REPLUG_INT_ACK (0x00000004) > #define DP_DP_HPD_UNPLUG_INT_ACK (0x00000008) > -#define DP_DP_HPD_STATE_STATUS_BITS_MASK (0x0000000F) > -#define DP_DP_HPD_STATE_STATUS_BITS_SHIFT (0x1C) > +#define DP_DP_HPD_STATE_STATUS_BITS_MASK (0x00000007) > +#define DP_DP_HPD_STATE_STATUS_BITS_SHIFT (0x1D) This file could use some genmasking.. Reviewed-by: Konrad Dybcio Konrad