From: Dave Hansen <dave.hansen@intel.com>
To: Ashok Raj <ashok.raj@intel.com>
Cc: "Chang S. Bae" <chang.seok.bae@intel.com>,
linux-kernel@vger.kernel.org, x86@kernel.org, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
tony.luck@intel.com, Yan Hua Wu <yanhua1.wu@intel.com>,
William Xie <william.xie@intel.com>
Subject: Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache writeback and invalidation
Date: Wed, 3 Jul 2024 13:55:19 -0700 [thread overview]
Message-ID: <6332f158-005b-4c3c-8709-350dbee23f7a@intel.com> (raw)
In-Reply-To: <ZoWZG75hFpfK6kkv@a4bf019067fa.jf.intel.com>
On 7/3/24 13:50, Ashok Raj wrote:
> Agree that we must get wider testing. Only caveat is that you should find a
> newer microcode to apply, which might be difficult for all products. Unless
> there is a debug option to reload force the same rev in case you don't have
> a newer ucode to test. Its good to get this in to reduce the big hammer
> effect.
Why is it hard to find a newer microcode to apply? Just because the
BIOS-provided one is more likely to be the last update the other the CPU?
next prev parent reply other threads:[~2024-07-03 20:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-01 21:20 [PATCH 0/1] x86/microcode: Revert cache flush on Intel microcode loading Chang S. Bae
2024-07-01 21:20 ` [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache writeback and invalidation Chang S. Bae
2024-07-01 22:56 ` Dave Hansen
2024-07-03 20:50 ` Ashok Raj
2024-07-03 20:55 ` Dave Hansen [this message]
2024-07-03 21:03 ` Ashok Raj
2024-07-03 21:11 ` Dave Hansen
2024-07-03 21:33 ` Ashok Raj
2024-07-04 0:05 ` Chang S. Bae
2024-07-02 23:24 ` Chang S. Bae
2024-09-10 18:35 ` Chang S. Bae
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