From: Dan Williams <dan.j.williams@intel.com>
To: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
Dan Williams <dan.j.williams@intel.com>,
<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Robert Richter <rrichter@amd.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Terry Bowman <terry.bowman@amd.com>,
Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [PATCH 0/2] efi/cper, cxl: Decode CXL Protocol Errors CPER
Date: Tue, 25 Oct 2022 17:11:02 -0700 [thread overview]
Message-ID: <63587b16dbb3_14192944c@dwillia2-mobl3.amr.corp.intel.com.notmuch> (raw)
In-Reply-To: <151c093f-1e92-1c8e-957b-8781e488626a@amd.com>
Smita Koralahalli wrote:
> Hi Dan,
>
> On 10/21/2022 3:18 PM, Dan Williams wrote:
> > Hi Smita,
> >
> > Smita Koralahalli wrote:
> >> This series adds decoding for the CXL Protocol Errors Common Platform
> >> Error Record.
> > Be sure to copy Ard Biesheuvel <ardb@kernel.org>, added, on
> > drivers/firmware/efi/ patches.
> >
> > Along those lines, drivers/cxl/ developers have an idea of what is
> > contained in the new CXL protocol error records and why Linux might want
> > to decode them, others from outside drivers/cxl/ might not. It always
> > helps to have a small summary of the benefit to end users of the
> > motivation to apply a patch set.
>
> Sure, will include in my v2.
>
> >
> >> Smita Koralahalli (2):
> >> efi/cper, cxl: Decode CXL Protocol Error Section
> >> efi/cper, cxl: Decode CXL Error Log
> >>
> >> drivers/firmware/efi/Makefile | 2 +-
> >> drivers/firmware/efi/cper.c | 9 +++
> >> drivers/firmware/efi/cper_cxl.c | 108 ++++++++++++++++++++++++++++++++
> >> drivers/firmware/efi/cper_cxl.h | 58 +++++++++++++++++
> >> include/linux/cxl_err.h | 21 +++++++
> >> 5 files changed, 197 insertions(+), 1 deletion(-)
> > I notice no updates for the trace events in ghes_do_proc(), is that next
> > in your queue? That's ok to be a follow-on after v2.
>
> Sorry, if I haven't understood this right. Are you implying about the
> "handling"
> of cxl memory errors in ghes_do_proc() or is it just copying of CPER
> entries to
> tracepoints?
Right now ghes_do_proc() will let the CXL CPER records fall through to
log_non_standard_event(). Are you planning to add trace event decode
there for CPER_SEC_CXL_PROT_ERR records?
I am not sure if the CXL CPER to trace record conversion belongs there,
or somewhere closer to trace_aer_event() invocations since the CXL
protocol errors are effectively an extenstion of PCI AER events.
next prev parent reply other threads:[~2022-10-26 0:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-07 21:17 Smita Koralahalli
2022-10-07 21:17 ` [PATCH 1/2] efi/cper, cxl: Decode CXL Protocol Error Section Smita Koralahalli
2022-10-10 14:24 ` Jonathan Cameron
2022-10-11 23:13 ` Smita Koralahalli
2022-10-12 13:04 ` Jonathan Cameron
2022-10-28 20:10 ` Smita Koralahalli
2022-10-07 21:17 ` [PATCH 2/2] efi/cper, cxl: Decode CXL Error Log Smita Koralahalli
2022-10-10 14:34 ` Jonathan Cameron
2022-10-11 23:17 ` Smita Koralahalli
2022-10-21 22:18 ` [PATCH 0/2] efi/cper, cxl: Decode CXL Protocol Errors CPER Dan Williams
2022-10-25 23:55 ` Smita Koralahalli
2022-10-26 0:11 ` Dan Williams [this message]
2022-10-26 19:31 ` Smita Koralahalli
2022-10-28 3:07 ` Jonathan Zhang (Infra)
2022-10-28 20:46 ` Dan Williams
2022-11-03 16:58 ` Jonathan Cameron
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