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Thu, 15 Jan 2026 04:32:20 -0600 Received: from [172.24.233.104] (a0507176-hp-z2-tower-g9-workstation-desktop-pc.dhcp.ti.com [172.24.233.104]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 60FAWHlW1419100; Thu, 15 Jan 2026 04:32:18 -0600 Content-Type: multipart/mixed; boundary="------------j1r0xgOJm8I9pV7DD1h6kRvq" Message-ID: <63a0c480-c953-4717-9efe-766038d7fa8b@ti.com> Date: Thu, 15 Jan 2026 16:02:16 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] pwm: tiehrpwm: Enable EHRPWM controller before setting configuration To: =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= CC: "Rafael V. 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On 10/01/26 04:23, Uwe Kleine-König wrote: > Hello Gokul, > > On Fri, Jan 09, 2026 at 11:21:46AM +0530, Gokul Praveen wrote: >> On 08/01/26 23:40, Uwe Kleine-König wrote: >>> On Thu, Jan 08, 2026 at 12:10:35PM +0530, Gokul Praveen wrote: >>>> On 08/01/26 01:17, Rafael V. Volkmer wrote: >>>>> Thanks for CC'ing me on this thread. >>>>> >>>>> On 07/01/26 15:21, Uwe Kleine-König wrote: >>>>>> adding Rafael to Cc: who sent a patch series for this driver that I >>>>>> didn't come around to review yet. Given that neither he nor me noticed >>>>>> the problem addressed in this patch I wonder if it applies to all >>>>>> hardware variants. >>>>>> >>>>> >>>>> I also didn't observe the issue described here in my testing: duty cycle and >>>>> period changes always appeared to take effect as expected. >>>>> >>>>> My tests were done on an AM623 EVM. >>>>> >>>>> One possible explanation is that my test flow mostly exercised configuration >>>>> while the PWM was already enabled/active, which could mask the effect of a >>>>> put_sync/reset happening after configuration. >>>>> >>>> >>>> Yes, this is the reason why the configuration was taking effect for you , >>>> Rafael, as the PWM was already enabled when setting the configuration hence >>>> masking the effect of a put_sync/reset happening after configuration. >>> >>> Can you provide a list of commands that show the failure? That would >>> result in less guessing for me. My plan is to reproduce the failure >>> tomorrow to better understand it on my boneblack. >> >> Sure Uwe. These are the commands I have tried for PWM signal generation: >> >> cd /sys/class/pwm/pwmchip0 >> /sys/class/pwm/pwmchip0# echo 0 > export >> /sys/class/pwm/pwmchip0# cd pwm0/ >> /sys/class/pwm/pwmchip0/pwm0# echo 10000000 > period >> /sys/class/pwm/pwmchip0/pwm0# echo 3000000 > duty_cycle >> /sys/class/pwm/pwmchip0/pwm0# echo "normal" > polarity >> /sys/class/pwm/pwmchip0/pwm0# echo 1 > enable >> >> Once these commands were executed, I measured the PWM signal using logic >> analyzer and the duty cycle was 100% even though we had set 30% duty cycle >> through the sysfs nodes. > > After that sequence I "see" a 30% relative duty cycle on my boneblack. > (With the follwing patch applied on top of pwm/for-next: > > diff --git a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts > index b4fdcf9c02b5..a3f4a4bb64e4 100644 > --- a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts > +++ b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts > @@ -173,3 +173,25 @@ &gpio3 { > &baseboard_eeprom { > vcc-supply = <&ldo4_reg>; > }; > + > +&am33xx_pinmux { > + ehrpwm0_pins: ehrpwm0-pins { > + pinctrl-single,pins = < > + /* P9.21 UART2_TXD -> ehrpwm0B */ > + AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) > + /* P9.22 UART2_RXD -> ehrpwm0A */ > + AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE3) > + >; > + }; > +}; > + > +&ehrpwm0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&ehrpwm0_pins>; > + > + status = "okay"; > +}; > + > +&epwmss0 { > + status = "okay"; > +}; > > ) > > That makes me think the problem isn't understood well yet and needs more > research. @Rafael, does the problem reproduce for you with Gokul's > recipe? (Or did you try that already? I understood your reply as "I > didn't encounter the issue but also didn't test specifically for that.") > > As I cannot reproduce the issue, can you please check if adding > > pm_runtime_get_sync(pwmchip_parent(chip)); > > to the probe function makes the problem disappear? Also please boot with > > trace_event=pwm > > on the command line and provide the content of > /sys/kernel/debug/tracing/trace after reproducing the problem. > PWM EVENT TRACING OUTPUT: ========================= # tracer: nop # # entries-in-buffer/entries-written: 3/3 #P:8 # # _-----=> irqs-off/BH-disabled # / _----=> need-resched # | / _---=> hardirq/softirq # || / _--=> preempt-depth # ||| / _-=> migrate-disable # |||| / delay # TASK-PID CPU# ||||| TIMESTAMP FUNCTION # | | | ||||| | | gen_pwm.sh-1039 [000] ..... 88.564669: pwm_apply: pwmchip0.1: period=100000000 duty_cycle=0 polarity=0 enabled=0 err=0 gen_pwm.sh-1039 [000] ..... 88.564728: pwm_apply: pwmchip0.1: period=100000000 duty_cycle=30000000 polarity=0 enabled=0 err=0 gen_pwm.sh-1039 [000] ..... 88.565065: pwm_apply: pwmchip0.1: period=100000000 duty_cycle=30000000 polarity=0 enabled=1 err=0 The trace output might mislead us thinking that the duty cycle is set properly as the event tracer reads the duty_cycle variable which gets set irrespective of whether the value gets reflected in the pwm registers or not. The best way to check if the value is reflected is by dumping the registers. On J784S4 EVM , I executed the script attached(gen_pwm.sh)and dumped the EPWM_CMPB Register(reflects the duty cycle) using the below command: >devmem2 0x03010014 Output: 0x00000000 The above output indicates that the duty cycle was not set as the register values are 0. However, after executing the command(echo 40000000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle) after the above steps were done(ie: executing script and dumping registers), the duty cycle is reflected properly. >devmem2 0x03010014 Output : 0x000065B9 The LSB 2 bytes(65B9)(reflecting EPWM_CMPB register) , indicates 40% duty cycle set properly. This is how I confirmed that there is a need to set the duty-cycle(different from the previous one) again, even after enabling the pwm. I am also sharing the device tree changes(0001-Enable-EHRPWM-1_B-using-AC33-pin.patch file) made to enable ehrpwm1_B on J784S4 EVM. Also, just ensure that SW2.2 is set high(1), so that the AC33 pin(used for EHRPWM1_B output) is routed to TP 126. Additionally, I also measured the PWM signal using logic analyzer and was able to reproduce this issue. Best Regards Gokul Praveen > Best regards > Uwe --------------j1r0xgOJm8I9pV7DD1h6kRvq Content-Type: application/x-shellscript; name="gen_pwm.sh" Content-Disposition: attachment; filename="gen_pwm.sh" Content-Transfer-Encoding: base64 Content-Description: gen_pwm.sh PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09 PT09PT09PT09PT09PT09PT09PT09PT09PT0gICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgCiMhL2Jpbi9iYXNoCgpjZCAvc3lz L2NsYXNzL3B3bS9wd21jaGlwMAplY2hvIDEgPiBleHBvcnQgI1dpbGwgZXhwb3J0IHB3bTEg ZGV2aWNlCmNkIHB3bTEvCmVjaG8gMTAwMDAwMDAwID4gcGVyaW9kICNJbiBuYW5vc2Vjb25k cwplY2hvIDMwMDAwMDAwID4gZHV0eV9jeWNsZSAjSW4gbmFub3NlY29uZHMKZWNobyAibm9y bWFsIiA+IHBvbGFyaXR5CmVjaG8gMSA+IGVuYWJsZQoKCg== --------------j1r0xgOJm8I9pV7DD1h6kRvq Content-Type: text/x-patch; charset="UTF-8"; name="0001-Enable-EHRPWM-1_B-using-AC33-pin.patch" Content-Disposition: attachment; filename="0001-Enable-EHRPWM-1_B-using-AC33-pin.patch" Content-Transfer-Encoding: base64 Content-Description: 0001-Enable-EHRPWM-1_B-using-AC33-pin.patch RnJvbSBkNGRhNjEwZjcxMDRmMjU0ZTdkYzVmOWQ3ZjZhYTFiMTEyZmRhMjg3IE1vbiBTZXAg MTcgMDA6MDA6MDAgMjAwMQpGcm9tOiBHb2t1bCBQcmF2ZWVuIDxnLXByYXZlZW5AdGkuY29t PgpEYXRlOiBUaHUsIDE1IEphbiAyMDI2IDE0OjUyOjU5ICswNTMwClN1YmplY3Q6IFtQQVRD SF0gRW5hYmxlIEVIUlBXTSAxX0IgdXNpbmcgQUMzMyBwaW4gRW5hYmxlIFBXTSBFVkVOVCBU UkFDSU5HCgotLS0KIC4uLi9ib290L2R0cy90aS9rMy1qNzg0czQtajc0MnMyLWNvbW1vbi5k dHNpICAgfCAgMSArCiAuLi4vZHRzL3RpL2szLWo3ODRzNC1qNzQyczItZXZtLWNvbW1vbi5k dHNpICAgIHwgMTggKysrKysrKysrKysrKysrKy0tCiBhcmNoL2FybTY0L2NvbmZpZ3MvZGVm Y29uZmlnICAgICAgICAgICAgICAgICAgIHwgIDcgKysrKysrLQogMyBmaWxlcyBjaGFuZ2Vk LCAyMyBpbnNlcnRpb25zKCspLCAzIGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2FyY2gv YXJtNjQvYm9vdC9kdHMvdGkvazMtajc4NHM0LWo3NDJzMi1jb21tb24uZHRzaSBiL2FyY2gv YXJtNjQvYm9vdC9kdHMvdGkvazMtajc4NHM0LWo3NDJzMi1jb21tb24uZHRzaQppbmRleCAx ZGNlZmYxMTlhNDcuLmFmNDEwM2YxNTllMyAxMDA2NDQKLS0tIGEvYXJjaC9hcm02NC9ib290 L2R0cy90aS9rMy1qNzg0czQtajc0MnMyLWNvbW1vbi5kdHNpCisrKyBiL2FyY2gvYXJtNjQv Ym9vdC9kdHMvdGkvazMtajc4NHM0LWo3NDJzMi1jb21tb24uZHRzaQpAQCAtMTAzLDYgKzEw Myw3IEBAIGNiYXNzX21haW46IGJ1c0AxMDAwMDAgewogCQkJIDwweDQ0IDB4MDAwMDAwMDAg MHg0NCAweDAwMDAwMDAwIDB4MDAgMHgwODAwMDAwMD4sIC8qIFBDSWUyIERBVDAgKi8KIAkJ CSA8MHg0NCAweDEwMDAwMDAwIDB4NDQgMHgxMDAwMDAwMCAweDAwIDB4MDgwMDAwMDA+LCAv KiBQQ0llMyBEQVQwICovCiAJCQkgPDB4NGUgMHgyMDAwMDAwMCAweDRlIDB4MjAwMDAwMDAg MHgwMCAweDAwMDgwMDAwPiwgLyogR1BVICovCisJCQkgPDB4MDAgMHgwMzAxMDAwMCAweDAw IDB4MDMwMTAwMDAgMHgwMCAweDAwMDAwMTAwPiwgLypFSFJQV00xKi8KIAogCQkJIC8qIE1D VVNTX1dLVVAgUmFuZ2UgKi8KIAkJCSA8MHgwMCAweDI4MzgwMDAwIDB4MDAgMHgyODM4MDAw MCAweDAwIDB4MDM4ODAwMDA+LApkaWZmIC0tZ2l0IGEvYXJjaC9hcm02NC9ib290L2R0cy90 aS9rMy1qNzg0czQtajc0MnMyLWV2bS1jb21tb24uZHRzaSBiL2FyY2gvYXJtNjQvYm9vdC9k dHMvdGkvazMtajc4NHM0LWo3NDJzMi1ldm0tY29tbW9uLmR0c2kKaW5kZXggZTUwNzM1NTc3 NzM3Li40YTYzZGRlYWEzNzIgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtNjQvYm9vdC9kdHMvdGkv azMtajc4NHM0LWo3NDJzMi1ldm0tY29tbW9uLmR0c2kKKysrIGIvYXJjaC9hcm02NC9ib290 L2R0cy90aS9rMy1qNzg0czQtajc0MnMyLWV2bS1jb21tb24uZHRzaQpAQCAtMjk2LDYgKzI5 NiwxMyBAQCBKNzg0UzRfSU9QQUQoMHgwZTgsIFBJTl9JTlBVVCwgOCkgLyogKEFSMzgpIFRJ TUVSX0lPMC5NTUMxX1NEQ0QgKi8KIAkJPjsKIAl9OwogCisJbWFpbl9laHJwd20xX3BpbnNf ZGVmYXVsdDogbWFpbi1laHJwd20xLXBpbnMtZGVmYXVsdCB7CisJCWJvb3RwaC1hbGw7CisJ CXBpbmN0cmwtc2luZ2xlLHBpbnMgPSA8CQkJCisJCQlKNzg0UzRfSU9QQUQoMHgwNzQsIFBJ Tl9PVVRQVVQsIDkpIC8qIChBQzMzKSBFSFJQV00xX0IuR1BJTzBfMjkgKi8KKwkJPjsKKwl9 OworCiAJdmRkX3NkX2R2X3BpbnNfZGVmYXVsdDogdmRkLXNkLWR2LWRlZmF1bHQtcGlucyB7 CiAJCXBpbmN0cmwtc2luZ2xlLHBpbnMgPSA8CiAJCQlKNzg0UzRfSU9QQUQoMHgwMjAsIFBJ Tl9JTlBVVCwgNykgLyogKEFKMzUpIE1DQU4xNV9SWC5HUElPMF84ICovCkBAIC02NjEsNiAr NjY4LDEzIEBAICZtY3VfdWFydDAgewogCXBpbmN0cmwtMCA9IDwmbWN1X3VhcnQwX3BpbnNf ZGVmYXVsdD47CiB9OwogCismbWFpbl9laHJwd20xIHsKKyAgICAgICAvKiBFSFJQV00xKi8K KyAgICAgICBwaW5jdHJsLW5hbWVzID0gImRlZmF1bHQiOworICAgICAgIHBpbmN0cmwtMCA9 IDwmbWFpbl9laHJwd20xX3BpbnNfZGVmYXVsdD47CisgICAgICAgc3RhdHVzID0gIm9rYXki OworfTsKKwogJm1haW5fdWFydDggewogCWJvb3RwaC1hbGw7CiAJc3RhdHVzID0gIm9rYXki OwpAQCAtODUyLDcgKzg2Niw3IEBAIHAxNS1ob2cgewogCQkJLyogUDE1IC0gQ0FOVUFSVF9N VVgxX1NFTDEgKi8KIAkJCWdwaW8taG9nOwogCQkJZ3Bpb3MgPSA8MTUgR1BJT19BQ1RJVkVf SElHSD47Ci0JCQlvdXRwdXQtaGlnaDsKKwkJCW91dHB1dC1sb3c7CiAJCQlsaW5lLW5hbWUg PSAiQ0FOVUFSVF9NVVgxX1NFTDEiOwogCQl9OwogCX07CkBAIC04ODgsNyArOTAyLDcgQEAg Jm1haW5fc2RoY2kwIHsKICZtYWluX3NkaGNpMSB7CiAJYm9vdHBoLWFsbDsKIAkvKiBTRCBj YXJkICovCi0Jc3RhdHVzID0gIm9rYXkiOworCXN0YXR1cyA9ICJkaXNhYmxlZCI7CiAJcGlu Y3RybC0wID0gPCZtYWluX21tYzFfcGluc19kZWZhdWx0PjsKIAlwaW5jdHJsLW5hbWVzID0g ImRlZmF1bHQiOwogCWRpc2FibGUtd3A7CmRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2NvbmZp Z3MvZGVmY29uZmlnIGIvYXJjaC9hcm02NC9jb25maWdzL2RlZmNvbmZpZwppbmRleCA0NTI4 OGVjOWVhZjcuLmQwOGQ5MzQ2ZTg0OCAxMDA2NDQKLS0tIGEvYXJjaC9hcm02NC9jb25maWdz L2RlZmNvbmZpZworKysgYi9hcmNoL2FybTY0L2NvbmZpZ3MvZGVmY29uZmlnCkBAIC0xNjQz LDcgKzE2NDMsNyBAQCBDT05GSUdfUFdNX1NUTTMyPW0KIENPTkZJR19QV01fU1VONEk9bQog Q09ORklHX1BXTV9URUdSQT1tCiBDT05GSUdfUFdNX1RJRUNBUD1tCi1DT05GSUdfUFdNX1RJ RUhSUFdNPW0KK0NPTkZJR19QV01fVElFSFJQV009eQogQ09ORklHX1BXTV9WSVNDT05UST1t CiBDT05GSUdfU0wyOENQTERfSU5UQz15CiBDT05GSUdfUUNPTV9QREM9eQpAQCAtMTg1OSw2 ICsxODU5LDEwIEBAIENPTkZJR19ERUJVR19GUz15CiAjIENPTkZJR19TQ0hFRF9ERUJVRyBp cyBub3Qgc2V0CiAjIENPTkZJR19ERUJVR19QUkVFTVBUIGlzIG5vdCBzZXQKICMgQ09ORklH X0ZUUkFDRSBpcyBub3Qgc2V0CitDT05GSUdfRlRSQUNFPXkKK0NPTkZJR19UUkFDSU5HPXkK K0NPTkZJR19FVkVOVF9UUkFDSU5HPXkKK0NPTkZJR19UUkFDSU5HX1NVUFBPUlQ9eQogQ09O RklHX0NPUkVTSUdIVD1tCiBDT05GSUdfQ09SRVNJR0hUX0xJTktfQU5EX1NJTktfVE1DPW0K IENPTkZJR19DT1JFU0lHSFRfQ0FUVT1tCkBAIC0xODY4LDMgKzE4NzIsNCBAQCBDT05GSUdf Q09SRVNJR0hUX1NUTT1tCiBDT05GSUdfQ09SRVNJR0hUX0NQVV9ERUJVRz1tCiBDT05GSUdf Q09SRVNJR0hUX0NUST1tCiBDT05GSUdfTUVNVEVTVD15CisKLS0gCjIuMzQuMQoK --------------j1r0xgOJm8I9pV7DD1h6kRvq--