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Thu, 16 Jul 2026 20:41:35 -0700 (PDT) X-Received: by 2002:a17:90b:4c8e:b0:37e:2005:6509 with SMTP id 98e67ed59e1d1-38e4b417444mr741468a91.3.1784259695109; Thu, 16 Jul 2026 20:41:35 -0700 (PDT) Received: from [10.217.198.242] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31429f9d44fsm1553673eec.1.2026.07.16.20.41.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jul 2026 20:41:34 -0700 (PDT) Message-ID: <64bf3979-51cc-42ed-b66b-c7af04536481@oss.qualcomm.com> Date: Fri, 17 Jul 2026 09:11:28 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC To: Bjorn Andersson , Krzysztof Kozlowski Cc: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio References: <20260715-purwa-pdc-v3-0-be08934dc916@oss.qualcomm.com> <20260715-purwa-pdc-v3-2-be08934dc916@oss.qualcomm.com> <20260716-starling-of-heavenly-symmetry-09a73a@quoll> Content-Language: en-US From: "Maulik Shah (mkshah)" In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE3MDAzMSBTYWx0ZWRfX4YVGKda2H7lW b7fPNcylftUZLMMarfwB0fHifPeH34F0jpKz3+my3O+2kza3GfQU3+jInY2dy2ptlXfjZJfejPG 8TnANqy7/hKaxtY/ZXz/1rQl7eHE5brYtdEVFQIN3f1HKOlZ93ebMsGA93+rzABwnKpmCdxLyUk R+ijiS6TymuFLZe/wNOPkgQoAJPY1N1aZEZ4nZ346dgOx6M2oIWDivCuB6+KN9gC/1+zqXyg6KP 5XFTOsgIxSyZiXmLN8b9MY5SMvIV4KJisntIWO17KgenuoHg5WQaHV3gdpLVTB8vj2bvYlbO6tQ cWrDoDJ0U4EeBo1A64R8pwfzRUWqQuFbUqF2U/Ud1Vn0aoHnJw+4H0hJxxCODa3ROFAuk7cbujp 3Hschqb2hygkNvgcOVdNbLvgJ2gLTMaP61yQi12sAyenVNRnaBJXmCIfgBuy4b/NWgiyGcBViBl guPW6AZc2Ww0oPW9mIQ== X-Authority-Analysis: v=2.4 cv=JJ8LdcKb c=1 sm=1 tr=0 ts=6a59a470 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=AKtfWkbxmUR3Wn90oXcA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE3MDAzMSBTYWx0ZWRfXwKG5GnbQWTdC /5KXTdGUnRmTZQQYJliDLSDuxQ2diT9yBly852/0iWG+Yo4ciYZdwe42ta9KEQhFYjTtEeHCZDQ SYlTVRJ5xTADrG79B2Xf8l8DduQShAY= X-Proofpoint-ORIG-GUID: feBeMs3EdMBEvfrKUTt2rdQt4K5OGWlr X-Proofpoint-GUID: feBeMs3EdMBEvfrKUTt2rdQt4K5OGWlr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-17_01,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 adultscore=0 suspectscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607170031 On 7/17/2026 7:38 AM, Bjorn Andersson wrote: > On Thu, Jul 16, 2026 at 09:59:44AM +0200, Krzysztof Kozlowski wrote: >> On Wed, Jul 15, 2026 at 06:52:01PM +0530, Maulik Shah wrote: >>> X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware >>> register bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: >>> Workaround hardware register bug on X1E80100") is already fixed in >>> X1P42100 silicon. >>> >>> X1E80100 compatible forces the software workaround. Use the X1P42100 >>> specific compatible string for the PDC node to remove the workaround. >>> >>> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD") >>> Reviewed-by: Konrad Dybcio >>> Signed-off-by: Maulik Shah >>> --- >>> arch/arm64/boot/dts/qcom/purwa.dtsi | 5 +++++ >>> 1 file changed, 5 insertions(+) >> >> Why does the DT change appear in the middle of the patchset? Please read >> submitting patches documents - both of them - and maintainer-soc >> profile. >> > > I thought I had figured it out, but I'm not sure anymore. > > The claim from the cover letter is that patch 1 and 2 are completely > independent, but patch 3 depends on Bartosz's thank you letter [2] that > arrived a week before this series was sent out. > > We're not merging the three changes through the same tree and there's no > expressed dependency between patch 2 and 3 (only implicitly by the order > in the series). But as Konrad points out, in-between patch 2 and 3 we > would not enable the secondary GPIO in the PDC driver, so Purwa would > have broken GPIOs for a while (not ok). I think merging them in the > opposite order would be what we want (i.e. 1, 3, then 2) purwa-iot-evk.dts where firmware sets pass through mode, so current order of the patch seems to be ok. (patch 3 as such is no impact for iot evk) x1p42100-crd.dts where firmware sets secondary mode, applying in 1, 2, and then 3 may leave crd boards in broken GPIOs for a while after [2], so yes order 1, 3, and then 2 makes more sense. patch 1/2 - fixes the purwa to operate on correct registers. patch 3 - Allow crd boards to re-set the mode to pass through > > > But this series implies that Purwa has been broken from the start - that > the PDC driver has always operated on the wrong registers. yes, purwa always operated on the wrong registers. > > Perhaps the impact of this was limited as there's not that many direct > &pdc references in the DT, but the patch that Bartosz's thank-you email > was sent for got merged as 77fbc756d9cb ("Revert "pinctrl: qcom: > x1e80100: Bypass PDC wakeup parent for now""), and that would make a lot > more use of the PDC. > > So while nothing in this series states it, it sounds like Purwa might be > completely broken right now and this series aims to fix it? > > > It's not clear to me why the driver change doesn't have a Fixes tag, it > seems like the patch that introduced x1e_quirk was broken and should be > marked as Fixes. x1e_quirk in the driver via commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround hardware register bug on X1E80100") says only about x1e/ hamoa specific bug, it seemed it never wanted to enable the quirk for x1p / purwa. the quirk rather got anyway enabled for purwa due to both hamoa/purwa sharing the same compatible. Patch 1/2 of the series aims to fix this (and patch-2 carries the fixes: tag). Thanks, Maulik > > [2] https://lore.kernel.org/linux-arm-msm/CAMRc=MeU0QuRozMscv02M59+a66S05Jm18CyvNE-qSYrY=S7hQ@mail.gmail.com/ > > Regards, > Bjorn > >> Best regards, >> Krzysztof >>