Re: [PATCH] soc: qcom: smem: support Glymur DRAM info

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 8/20/26 9:31 PM, Abel Vesa wrote:
> On 26-08-20 18:30:08, Konrad Dybcio wrote:
>> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>
>> Glymur firmware provides a version 7 DDR-info SMEM entry whose 872-byte
>> layout is different from the one the driver supports today.
>>
>> The data contains 16 channel descriptors, 14 DDR frequency slots, four
>> 4 DDR region slots, a 10-entry SHUB frequency plan, and v6 misc information.
>> It accounts for 616 bytes; the captured SMEM entry has a further 256
>> zero bytes.

[...]

>> @@ -39,6 +49,7 @@ enum ddr_info_version {
>>  	INFO_V6, /* INFO_V6 seems to only have shipped with 6 DDR regions, unlike V7 */
>>  	INFO_V7,
>>  	INFO_V7_WITH_6_REGIONS,
>> +	INFO_V7_GLYMUR,
> 
> Just curious, isn't there like a minor version number that could be
> used instead of the GLYMUR suffix here?

There are no minor versions, it's really more of a "version 7 baseline
with X regions, with Y shub frequencies, max of Z channels and somehow
lots of extra zero padding at the end".

This is unfortunately a huge mess..

Konrad